Reaching fault tolerance means scaling qubit counts by orders of magnitude, a jump that conventional superconducting architectures cannot sustain without solving the so-called `wiring problem'. Global control sidesteps this bottleneck, but implementing quantum error correction (QEC) on previously proposed global architectures incurs extremely steep overhead costs, due to the need for separate correction procedures for the computational and auxiliary qubits that comprise the global device. We resolve this by introducing the first globally-controlled architecture with zero qubit overhead. Every physical qubit is a computational qubit, and thus, every qubit is protected under a single error correcting scheme. We identify a class of cyclic stabilizer codes realizable through global iSWAP and single-qubit gates, yielding QEC thresholds nearly seven orders of magnitude larger than previous estimates for globally-controlled arrays. We further show these thresholds improve systematically as the global architecture is augmented with a limited amount of local measurement sites, demonstrating a trade-off between wiring simplicity and fault-tolerant performance.
Reaching fault tolerance means scaling qubit counts by orders of magnitude, a jump that conventional superconducting architectures cannot sustain without solving the so-called `wiring problem'. Global control sidesteps this bottleneck, but implementing quantum error correction (QEC) on previously proposed global architectures incurs extremely steep overhead costs, due to the need for separate correction procedures for the computational and auxiliary qubits that comprise the global device. We resolve this by introducing the first globally-controlled architecture with zero qubit overhead. Every physical qubit is a computational qubit, and thus, every qubit is protected under a single error correcting scheme. We identify a class of cyclic stabilizer codes realizable through global iSWAP and single-qubit gates, yielding QEC thresholds nearly seven orders of magnitude larger than previous estimates for globally-controlled arrays. We further show these thresholds improve systematically as the global architecture is augmented with a limited amount of local measurement sites, demonstrating a trade-off between wiring simplicity and fault-tolerant performance.
The overhead of quantum error correction (QEC) poses a major bottleneck for realizing fault-tolerant computation. To reduce this overhead, we exploit the idea of erasure qubits, relying on an efficient conversion of the dominant noise into erasures at known locations. We start by introducing a formalism for QEC schemes with erasure qubits and express the corresponding decoding problem as a matching problem. Then, we propose and optimize QEC schemes based on erasure qubits and the recently introduced Floquet codes. Our schemes are well suited for superconducting circuits, being compatible with planar layouts. We numerically estimate the memory thresholds for the circuit noise model that includes spreading (via entangling operations) and imperfect detection of erasures. Our results demonstrate that, despite being slightly more complex, QEC schemes based on erasure qubits can significantly outperform standard approaches.
Quantum error correction (QEC) represents the cornerstone technology for realizing fault-tolerant quantum computing, addressing the fundamental challenge of quantum state decoherence in noisy intermediate-scale quantum (NISQ) devices. This comprehensive review examines recent advances in QEC implementations from 2020-2024, spanning theoretical foundations to practical hardware demonstrations. We analyze the evolution from pioneering stabilizer codes to modern topological approaches, with particular emphasis on surface codes and low-density parity-check (LDPC) codes that have demonstrated below-threshold error correction in superconducting and trapped-ion systems. The paper provides a comparative analysis of classical and machine learning-based decoder algorithms, evaluating their performance through complexity analysis and threshold comparisons in real-time error correction scenarios. Through examination of breakthrough experiments by Google, IBM, Quantinuum, and emerging platforms, we assess the current state of fault-tolerant quantum computing and identify critical engineering challenges including correlated noise models, cryogenic control systems, and scalable logical gate implementations. Our quantitative analysis reveals that while significant progress has been made toward practical fault-tolerance thresholds, achieving the resource efficiency and reliability required for large-scale quantum computation remains challenging. We provide detailed resource estimates for key applications including Shor's algorithm and optimization problems, along with analysis of industry roadmaps toward thousand-logical-qubit systems. This review serves as a comprehensive guide for researchers and engineers working toward the next generation of fault-tolerant quantum computers, with particular focus on information-theoretic perspectives relevant to quantum information entropy and syndrome processing.
Quantum error correction (QEC) represents the cornerstone technology for realizing fault-tolerant quantum computing, addressing the fundamental challenge of quantum state decoherence in noisy intermediate-scale quantum (NISQ) devices. This comprehensive review examines recent advances in QEC implementations from 2020-2024, spanning theoretical foundations to practical hardware demonstrations. We analyze the evolution from pioneering stabilizer codes to modern topological approaches, with particular emphasis on surface codes and low-density parity-check (LDPC) codes that have demonstrated below-threshold error correction in superconducting and trapped-ion systems. The paper provides a comparative analysis of classical and machine learning-based decoder algorithms, evaluating their performance through complexity analysis and threshold comparisons in real-time error correction scenarios. Through examination of breakthrough experiments by Google, IBM, Quantinuum, and emerging platforms, we assess the current state of fault-tolerant quantum computing and identify critical engineering challenges including correlated noise models, cryogenic control systems, and scalable logical gate implementations. Our quantitative analysis reveals that while significant progress has been made toward practical fault-tolerance thresholds, achieving the resource efficiency and reliability required for large-scale quantum computation remains challenging. We provide detailed resource estimates for key applications including Shor's algorithm and optimization problems, along with analysis of industry roadmaps toward thousand-logical-qubit systems. This review serves as a comprehensive guide for researchers and engineers working toward the next generation of fault-tolerant quantum computers, with particular focus on information-theoretic perspectives relevant to quantum information entropy and syndrome processing.
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit.
We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.
The ability to coherently and reliably manipulate quantum information marks a fundamental technological leap—realizable through a universal, fault‑tolerant quantum computer. Achieving this goal requires progress across all layers of the quantum computing stack, from physical qubits to theoretical algorithms. In this work, we address multiple layers of this stack. We develop a software architecture for scalable device calibration using modular calibration graphs. We introduce real‑time frequency stabilization techniques, demonstrating improved single‑qubit gate fidelities and progress toward multiqubit feedback. Finally, we explore how quantum error correction overhead can be reduced using low‑density parity‑check codes. We present logical protocols for a non‑local nine‑qubit code, which significantly outperforms comparable surface code implementations in both qubit efficiency and computational capability. These results represent practical steps toward overcoming key challenges in fault‑tolerant quantum computing.
An interesting concept in quantum computation is that of global control (GC), where there is no need to manipulate qubits individually. One can implement a universal set of quantum gates on a one-dimensional array purely via signals that target the entire structure indiscriminately. But large-scale quantum computation imposes several requirements in terms of noise level, time, space (scaling) and in particular parallelism. Keeping in mind these requirements, we prove GC can support error-correction, by implementing two simple codes. This opens the way to fault-tolerant computation with this type of architecture.