arXiv:2607.27971

Optimizing Memory Efficiency and Index Ordering to Simulate Quantum Circuits Using Tensor Decision Diagrams

Vicente López-Oliva, José Manuel Badía Contelles, Maria Isabel Castillo Catalán

Published Jul 30, 2026• 0 citations

Abstract

Combining Tensor Networks (TNs) and Decision Diagrams (DDs) provides a high-performance framework for the exact simulation of quantum circuits on classical computers by exploiting structural redundancies and topological entanglement. However, improving the scalability of hybrid tools such as the Fast Tensor Decision Diagram (FTDD) requires addressing strict memory growth constraints and complex node management during tensor contractions. In this paper, we propose a hardware-aware architectural optimization of the FTDD framework, with two main contributions: first, we overhaul the internal memory management through a fixed-footprint memory model, strict node lifecycle tracking, and a systematic evaluation of table-sizing policies (exponential, static, and hybrid) to reduce allocation overhead and control memory growth; second, we introduce Path, a new index-ordering heuristic guided by the contraction path, and conduct a comprehensive study of variable index-ordering strategies, an important factor for DD compression. By comparing the original alphanumeric ordering, RCM, and our Path heuristic across diverse circuit topologies, we show that index permutation strongly affects node sharing and diagram density. Experimental evaluation confirms that our optimized FTDD engine bounds memory consumption under structured quantum workloads, enabling stable execution of circuits such as QFT with up to 100 qubits. Furthermore, we systematically characterize execution time, memory footprint, and topological trade-offs across diverse quantum benchmarks.

DOI: 10.48550/arxiv.2607.27971

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