Compiling arbitrary-connectivity NISQ circuits onto monolithic single-zone neutral-atom devices is constrained by a finite interaction range and a minimum separation between simultaneously addressable sites. Under the minimum-separation constraint, the SWAP-only configuration of our pipeline does not return a schedule within a practical time budget on a range of circuits, including circuits as small as nine qubits. We address this with hub traps, a small number of dynamically placed empty traps that serve as transit waypoints, together with a per-gate rule that chooses between SWAP-based routing and hub-mediated shuttling. We evaluate the compiler on seventeen benchmarks using analytic estimates of execution time and a per-layer fidelity proxy, comparing against a placement-matched baseline and against ablations of our own pipeline. Hub traps make these otherwise-unsolved circuits compile in seconds to minutes and remove SWAP gates entirely on every completed circuit, so their role is to enable routing rather than only to optimize fidelity. The benefit is concentrated on routing-dominated circuits and is absent on routing-free ones, which we separate by the structure of the interaction graph. On the most routing-dominated circuit the fidelity proxy improves by up to three orders of magnitude over the placement-matched baseline. The gain comes primarily from eliminating SWAP overhead, as the absolute fidelities there remain low.
Compiling arbitrary-connectivity NISQ circuits onto monolithic single-zone neutral-atom devices is constrained by a finite interaction range and a minimum separation between simultaneously addressable sites. Under the minimum-separation constraint, the SWAP-only configuration of our pipeline does not return a schedule within a practical time budget on a range of circuits, including circuits as small as nine qubits. We address this with hub traps, a small number of dynamically placed empty traps that serve as transit waypoints, together with a per-gate rule that chooses between SWAP-based routing and hub-mediated shuttling. We evaluate the compiler on seventeen benchmarks using analytic estimates of execution time and a per-layer fidelity proxy, comparing against a placement-matched baseline and against ablations of our own pipeline. Hub traps make these otherwise-unsolved circuits compile in seconds to minutes and remove SWAP gates entirely on every completed circuit, so their role is to enable routing rather than only to optimize fidelity. The benefit is concentrated on routing-dominated circuits and is absent on routing-free ones, which we separate by the structure of the interaction graph. On the most routing-dominated circuit the fidelity proxy improves by up to three orders of magnitude over the placement-matched baseline. The gain comes primarily from eliminating SWAP overhead, as the absolute fidelities there remain low.
Advanced neutral atom quantum systems are being developed by the industry due to its unique hardware features that enable efficient quantum circuit execution. In fact, neutral atom quantum systems are the only platforms that simultaneously support both long-range qubit interactions and native multi-qubit gates. However, the unique characteristics of neutral atom devices limit the applicability of existing qubit mapping methods developed for other quantum devices, and the state-of-the-art mapping approach [13] for neutral atom devices suffers from long runtime and low shuttle scheduling parallelism. We introduce a novel mapping and shuttling framework for neutral atom devices. We first partition the input circuit into a sequence of subcircuits, each associated with a mapping that enables the execution of all gates in the subcircuit. To find these mappings efficiently, we adopt a flexible strategy that dynamically switches between two mapping search methods. Then, for each pair of consecutive mappings, we schedule the shuttling operations required to transition between them and prioritize timing-critical operations to improve parallelism. We performed experiments on three benchmark sets, including circuits with up to 1617 qubits and more than 100,000 gates. Our proposed framework resulted in high-quality routing solutions and consistently achieves higher fidelity with shorter runtime compared to existing approaches.
Reconfigurable neutral-atom processors couple gate scheduling, atom placement, and parallel atom transport, so compiler decisions jointly determine physical execution costs. Evaluating these compilers requires attainable resource references and a way to trace excess costs to their causes. We present NAKO, a benchmarking framework that parameterizes circuits by qubit count, logical depth, and requested one- and two-qubit gate densities, and assigns attainable targets for Rydberg stages, routing intervals, and movement layers. Each benchmark is paired with an executable reference schedule; under the stated execution model, construction guarantees minimum Rydberg-stage and routing-interval counts, and minimum movement among schedules with the minimum Rydberg-stage count. Comparing compiler outputs with these references quantifies resource gaps, while reference mappings and intermediate physical states enable controlled interventions that trace excess costs to specific compiler decisions. In a 648-run evaluation of Enola and OLSQ-DPQA, NAKO identifies distinct bottlenecks. For Enola, placement scoring and cross-stage layout management contribute to excess movement; diagnosis-guided interventions reduce mean movement by 78.9% across five matched circuits. For OLSQ-DPQA, premature candidate selection and limited exploration of preparatory states produce avoidable entangling stages and routing intervals; four fixed-checkpoint continuations each eliminate one Rydberg stage and one routing interval without increasing movement. NAKO thus links resource targets backed by constructive optimality guarantees to controlled diagnosis and validation of compiler-specific resource savings.
Resource estimation is a significant challenge in evaluating fault tolerant quantum computers. Existing approaches often rely on either fixed architectural assumptions or coarse analytical models that fail to capture the interaction between hardware constraints and circuit compilation. This challenge is particularly acute for neutral atom quantum computers, where architectural features such as atom movement, measurement zones, and multi-species arrays introduce a broad design space for implementing fault tolerant computation. Addressing the need for a tighter feedback loop between hardware design and practical application development, we present a compilation-driven framework for quantum resource estimation that translates arbitrary quantum circuits into logical primitive operations with known physical resource costs. This framework allows for easily configurable hardware assumptions that enable rapid comparison of different architectural design choices. We apply our approach to two early fault tolerant quantum simulation and optimization workloads, assuming the use of the surface code, revealing several architectural trends. While the production of magic states continues to be the dominant source of overhead for these benchmarks, access to movement can save time on cultivation and important transversal gates. As problem size grows, routing and qubit movement become dominant bottlenecks, highlighting the need for movement-aware compiler optimizations and frugal routing strategies. Finally, our results suggest that neutral atom architectures combining dual-species arrays with controlled qubit movement offer a promising path toward near-term advantage on fault tolerant devices.
Neutral atom quantum computing offers strong scalability and flexible qubit connectivity, but most existing compilation flows rely on reconfigurable atom arrays that physically shuttle qubit atoms during execution. Although this approach improves connectivity, it also introduces handoff errors, motional heating, and atom-loss risks that can degrade overall fidelity. We present BRIDGE, a Buffer-Relay Interconnect for Data-stable Gate Execution that co-designs a static, compiler-managed buffer-relay fabric with a lazy-move compiler that exploits it. BRIDGE targets an optimized, dual-species 2D interleaved atom array, using non-encoding ``buffer atoms'' to mediate long-range interactions in the fixed baseline and introducing limited data motion only for selected hotspots. By using calibrated heteronuclear and homonuclear Rydberg channels, BRIDGE realizes a static routing backbone in which data-buffer and buffer-buffer interactions are enabled while residual data-data crosstalk is suppressed. Across a 22-circuit matched benchmark suite re-estimated under a single shared error model, BRIDGE attains a geometric-mean $\sim10\times$ higher total fidelity than ZAP and $\sim16\times$ than Enola, together with $\sim540\times$ and $\sim1000\times$ lower circuit execution time, respectively, while reducing data-atom movement from thousands of transport events to zero.
Despite major ongoing advancements in neutral atom hardware technology, there remains limited work in systems-level software tailored to overcoming the challenges of neutral atom quantum computers. In particular, most current neutral atom architectures do not natively support local addressing of single-qubit rotations about an axis in the xy-plane of the Bloch sphere. Instead, these are executed via global beams applied simultaneously to all qubits. While previous neutral atom experimental work has used straightforward synthesis methods to convert short sequences of operations into this native gate set, these methods cannot be incorporated into a systems-level framework nor applied to entire circuits without imposing impractical amounts of serialization. Without sufficient compiler optimizations, decompositions involving global gates will significantly increase circuit depth, gate count, and accumulation of errors. No prior compiler work has addressed this, and adapting existing compilers to solve this problem is nontrivial. In this paper, we present an optimized compiler pipeline that translates an input circuit from an arbitrary gate set into a realistic neutral atom native gate set containing global gates. We focus on decomposition and scheduling passes that minimize the final circuit's global gate count and total global rotation amount. As we show, these costs contribute the most to the circuit's duration and overall error, relative to costs incurred by other gate types. Compared to the unoptimized version of our compiler pipeline, minimizing global gate costs gives up to 4.77x speedup in circuit duration. Compared to the closest prior existing work, we achieve up to 53.8x speedup. For large circuits, we observe a few orders of magnitude improvement in circuit fidelities.
The scalability of neutral-atom quantum computing is increasingly limited by a compiler–architecture challenge: logical circuits must be mapped onto dynamically reconfigurable atom arrays while controlling crosstalk, transport overhead, and hardware constraints. To address this problem, we present ZAP, a co-designed zoned architecture and deterministic compiler for field-programmable atom arrays. ZAP partitions the array into storage and entanglement zones and combines hardware-aware ASAP-separate scheduling, look-ahead placement, and conflict-aware routing in a single-pass compilation flow, thereby avoiding the repeated global search used in prior approaches. Evaluated on structured quantum benchmarks and random 3-regular circuits, ZAP consistently delivers multi-order-of-magnitude compilation speedups while maintaining competitive or superior execution quality. Relative to ZAC and PowerMove, ZAP typically reduces compilation time from tens of seconds to below 0.1 s and achieves speedups exceeding 1,000×; relative to Enola, the speedup exceeds 10,000× on the evaluated suite. ZAP's fidelity gains are most pronounced on structured workloads with irregular connectivity and nonuniform qubit reuse, where its scheduling and placement decisions more effectively suppress crosstalk and limit transport-related loss, while on random circuits it remains competitive and preserves the same scalability advantage. These results show that hardware-structured, non-iterative compilation provides a practical path toward fast, scalable, and noise-aware neutral-atom quantum computing.