Matrix product states provide efficient classical descriptions of quantum systems that may be useful as reference states for quantum algorithms such as quantum phase estimation and quantum-selected configuration interaction. Shallow circuit constructions for loading matrix product states onto quantum computers is necessary for this to be practical on near-term hardware. We present a decomposition of matrix product states to log-depth quantum circuits via a simple tree tensor network renormalisation procedure. Our method exposes an explicit parameter which can be used to trade a small amount of fidelity for large savings in circuit depth. We extend this decomposition to the case of matrix product operators allowing us to construct log-depth and ancilla-free circuits to calculate overlaps of the form $\left |\langleφ|U|ψ\rangle\right |^2$. In particular, we demonstrate an interpretation of these circuits as \emph{verifier circuits} with application to circuit-level device calibration.
Matrix product states provide efficient classical descriptions of quantum systems that may be useful as reference states for quantum algorithms such as quantum phase estimation and quantum-selected configuration interaction. Shallow circuit constructions for loading matrix product states onto quantum computers is necessary for this to be practical on near-term hardware. We present a decomposition of matrix product states to log-depth quantum circuits via a simple tree tensor network renormalisation procedure. Our method exposes an explicit parameter which can be used to trade a small amount of fidelity for large savings in circuit depth. We extend this decomposition to the case of matrix product operators allowing us to construct log-depth and ancilla-free circuits to calculate overlaps of the form ∣⟨φ∣U∣ψ⟩∣2. In particular, we demonstrate an interpretation of these circuits as \emph{verifier circuits} with application to circuit-level device calibration.
Preparing matrix product states (MPS) on a quantum device is a key subroutine in many quantum algorithms. The most competitive methods, based on the renormalisation group, prepare translationally invariant MPS of size L and bond dimension χ, up to an error ε, in circuit depth O~(χ4log(L/ε)) or O~(χ6loglog(L/ε)). We improve multiple aspects of these methods. First, using block-encoded correction maps, whose post-selection succeeds with constant probability, we render the preparation exact without sacrificing the scaling in L. Second, through a generalisation of oblivious amplitude amplification to isometries, we reduce the bond-dimension dependence, improving the depth to O~(χ2logL+χ4) or O~(χ2loglogL+χ4), and even to O~(χ3logL) for incoherent preparations. Finally, we extend the framework to non-translationally invariant MPS and prove logarithmic-depth exact preparation for independent and identically distributed random tensor sequences. Confirmed by numerical studies, these results constitute, to the best of our knowledge, the most efficient exact MPS preparation protocols in the relevant parameter regimes.
Variational Quantum Algorithms (VQAs) are being highlighted as key quantum algorithms for demonstrating quantum advantage on Noisy Intermediate-Scale Quantum (NISQ) devices, which are limited to executing shallow quantum circuits because of noise. However, the barren plateau problem, where the gradient of the loss function becomes exponentially small with system size, hinders this goal. Recent studies suggest that embedding tensor networks into quantum circuits and initializing the parameters can avoid the barren plateau. Yet, embedding tensor networks into quantum circuits is generally difficult, and methods have been limited to the simplest structure, Matrix Product States (MPSs). This study proposes a method to embed Tree Tensor Networks (TTNs), characterized by their hierarchical structure, into shallow quantum circuits. TTNs are suitable for representing two-dimensional systems and systems with long-range correlations, which MPSs are inadequate for representing. Our numerical results show that embedding TTNs provides better initial quantum circuits than MPS. Additionally, our method has a practical computational complexity, making it applicable to a wide range of TTNs. This study is expected to extend the application of VQAs to two-dimensional systems and those with long-range correlations, which have been challenging to utilize.
Near-term quantum devices generally suffer from shallow circuit depth and hence limited expressivity due to noise and decoherence. To address this, we propose tensor-network-assisted parametrized quantum circuits, which concatenate a classical tensor-network operator with a quantum circuit to effectively increase the circuit's expressivity without requiring a physically deeper circuit. We present a framework for tensor-network-assisted variational quantum algorithms that can solve quantum many-body problems using shallower quantum circuits. We demonstrate the efficiency of this approach by considering two examples of unitary matrix-product operators and unitary tree tensor networks, showing that they can both be implemented efficiently. Through numerical simulations, we show that the expressivity of these circuits is greatly enhanced with the assistance of tensor networks. We apply our method to two-dimensional Ising models and one-dimensional time-crystal Hamiltonian models with up to 16 qubits and demonstrate that our approach consistently outperforms conventional methods using shallow quantum circuits.
Abstract Tensor networks (TNs) are a family of computational methods built on graph-structured factorizations of large tensors, which have long represented state-of-the-art methods for the approximate simulation of complex quantum systems on classical computers. The rapid pace of recent advancements in numerical computation, notably the rise of GPU and TPU hardware accelerators, have allowed TN algorithms to scale to even larger quantum simulation problems, and to be employed more broadly for solving machine learning tasks. The "quantum-inspired" nature of TNs permits them to be mapped to parametrized quantum circuits (PQCs), a fact which has inspired recent proposals for enhancing the performance of TN algorithms using near-term quantum devices, as well as enabling joint quantum-classical training frameworks which benefit from the distinct strengths of TN and PQC models. However, the success of any such methods depends on efficient and accurate methods for approximating TN states using realistic quantum circuits, something which remains an unresolved question. In this work, we compare a range of novel and previously-developed algorithmic protocols for decomposing matrix product states (MPS) of arbitrary bond dimension into low-depth quantum circuits consisting of stacked linear layers of two-qubit unitaries. These protocols are formed from different combinations of a preexisting analytical decomposition scheme with constrained optimization of circuit unitaries, and all possess efficient classical runtimes. Our experimental results reveal one particular protocol, involving sequential growth and optimization of the quantum circuit, to outperform all other methods, with even greater benefits seen in the setting of limited computational resources. Given these promising results, we expect our proposed decomposition protocol to form a useful ingredient within any joint application of TNs and PQCs, in turn further unlocking the rich and complementary benefits of classical and quantum computation.
Implementing many important sub-circuits on near-term quantum devices remains a challenge due to the high levels of noise and the prohibitive depth on standard nearest-neighbour topologies. Overcoming these barriers will likely require quantum error mitigation (QEM) strategies. This work introduces the notion of efficient, high-fidelity verifier circuit architectures that we propose for use in such a QEM scheme. We provide a method for constructing verifier circuits for any quantum circuit that is accurately represented by a low-dimensional matrix product operator (MPO). We demonstrate our method by constructing explicit verifier circuits for multi-controlled single unitary gates as well as the quantum Fourier transform (QFT). By transpiling the circuits to a 2D array of qubits, we estimate the crossover point where the verifier circuit is shallower than the circuit itself, and hence useful for QEM. We propose a method of in situ QEM using the verifier circuit architecture. We conclude that our approach may be useful for calibrating quantum sub-circuits to counter coherent noise but cannot correct for the incoherent noise present in current devices.
State preparation compilers for quantum computers typically sit at two extremes: general-purpose routines that treat the target as an opaque amplitude vector, and bespoke constructions for a handful of well-known state families. We ask whether a compiler can instead accept simple, structure-aware specifications while providing predictable resource guarantees. We answer this by designing and implementing a quantum state-preparation compiler for regular language states (RLS): uniform superpositions over bitstrings accepted by a regular description, and their complements. Users describe the target state via (i) a finite set of bitstrings, (ii) a regular expression, or (iii) a deterministic finite automaton (DFA), optionally with a complement flag. By translating the input to a DFA, minimizing it, and mapping it to an optimal matrix product state (MPS), the compiler obtains an intermediate representation (IR) that exposes and compresses hidden structure. The efficient DFA representation and minimization offloads expensive linear algebra computation in exchange of simpler automata manipulations. The combination of the regular-language frontend and this IR gives concise specifications not only for RLS but also for their complements that might otherwise require exponentially large state descriptions. This enables state preparation of an RLS or its complement with the same asymptotic resources and compile time. We outline two hardware-aware backends: SeqRLSP, which yields linear-depth, ancilla-free circuits for linear nearest-neighbor architectures via sequential generation, and TreeRLSP, which achieves logarithmic depth on all-to-all connectivity via a tree tensor network. We prove depth and gate-count bounds scaling with the system size and the state's maximal Schmidt rank, and we give explicit compile-time bounds that expose the benefit of our approach. We implement and evaluate the pipeline.