In the presence of qubit losses, the building blocks of fault-tolerant error correction (FTEC) must be revisited. Existing loss-tolerant approaches are mainly architecture-specific, and little attention has been given to optimizing the syndrome measurement sequences under loss. Schemes designed for the standard Pauli error model are not directly applicable because the syndrome patterns differ when both Pauli errors and erasures can occur.
Based on recent advances in loss detection units and loss-tolerant syndrome extraction gadgets, we extend the study of adaptive Shor-style measurement sequences to the mixed error model. We begin by discussing how to adaptively convert correctable erasures into located errors. The minimal overhead is quantified by the number of stabilizer measurements, which can be reduced to a subgroup dimension problem for erasures arising in any FTEC circuit for qubits and prime-dimensional qudits. As a byproduct, we provide the construction of the canonical generating set with respect to a given bipartite partition for a stabilizer group on qudits of composite dimension. We then generalize both the weak and strong FTEC conditions. Finally, we present adaptive syndrome-measurement protocols for the mixed error model, generalizing the adaptive protocols for the standard Pauli error model.
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26 pages, 3 figures. Improved version of the QEC26 submission
In the presence of qubit losses, the building blocks of fault-tolerant error correction (FTEC) must be revisited. Existing loss-tolerant approaches are mainly architecture-specific, and little attention has been given to optimizing the syndrome measurement sequences under loss. Schemes designed for the standard Pauli error model are not directly applicable because the syndrome patterns differ when both Pauli errors and erasures can occur.
Based on recent advances in loss detection units and loss-tolerant syndrome extraction gadgets, we extend the study of adaptive Shor-style measurement sequences to the mixed error model. We begin by discussing how to adaptively convert correctable erasures into located errors. The minimal overhead is quantified by the number of stabilizer measurements, which can be reduced to a subgroup dimension problem for erasures arising in any FTEC circuit for qubits and prime-dimensional qudits. As a byproduct, we provide the construction of the canonical generating set with respect to a given bipartite partition for a stabilizer group on qudits of composite dimension. We then generalize both the weak and strong FTEC conditions. Finally, we present adaptive syndrome-measurement protocols for the mixed error model, generalizing the adaptive protocols for the standard Pauli error model.
The Shor fault-tolerant error correction (FTEC) scheme uses transversal gates and ancilla qubits prepared in the cat state in syndrome extraction circuits to prevent propagation of errors caused by gate faults. For a stabilizer code of distance d that can correct up to t=⌊(d−1)/2⌋ errors, the traditional Shor scheme handles ancilla preparation and measurement faults by performing syndrome measurements until the syndromes are repeated t+1 times in a row; in the worst-case scenario, (t+1)2 rounds of measurements are required. In this work, we improve the Shor FTEC scheme using an adaptive syndrome measurement technique. The syndrome for error correction is determined based on information from the differences of syndromes obtained from consecutive rounds. Our protocols that satisfy the strong and the weak FTEC conditions require no more than (t+3)2/4−1 rounds and (t+3)2/4−2 rounds, respectively, and are applicable to any stabilizer code. Our simulations of FTEC protocols with the adaptive schemes on hexagonal color codes of small distances verify that our protocols preserve the code distance, can increase the pseudothreshold, and can decrease the average number of rounds compared to the traditional Shor scheme. We also find that for the code of distance d , our FTEC protocols with the adaptive schemes require no more than d rounds on average.
We optimize fault-tolerant quantum error correction to reduce the number of syndrome bit measurements. Speeding up error correction will also speed up an encoded quantum computation, and should reduce its effective error rate. We give both code-specific and general methods, using a variety of techniques and in a variety of settings. We design new quantum error-correcting codes specifically for efficient error correction, e.g., allowing single-shot error correction. For codes with multiple logical qubits, we give methods for combining error correction with partial logical measurements. There are tradeoffs in choosing a code and error-correction technique. While to date most work has concentrated on optimizing the syndrome-extraction procedure, we show that there are also substantial benefits to optimizing how the measured syndromes are chosen and used. As an example, we design single-shot measurement sequences for fault-tolerant quantum error correction with the 16-qubit extended Hamming code. Our scheme uses 10 syndrome bit measurements, compared to 40 measurements with the Shor scheme. We design single-shot logical measurements as well: any logical Z measurement can be made together with fault-tolerant error correction using only 11 measurements. For comparison, using the Shor scheme a basic implementation of such a non-destructive logical measurement uses 63 measurements. We also offer ten open problems, the solutions of which could lead to substantial improvements of fault-tolerant error correction.
Neutral-atom arrays are a leading qubit technology for large-scale, fault-tolerant quantum computing (FTQC). A dominant error source on this platform is qubit loss, which accrues with every operation and movement. The presence of loss undermines the promises of existing architectural work. Standard error correction targets stochastic Pauli errors and cannot correct loss, so most FTQC performance analyses are not directly compatible with it. Moreover, compilation and routing decisions, which strongly affect overall loss, are typically optimized against Pauli-error cost models and often remain loss-agnostic, potentially increasing exposure to the loss channel.
In this work, we comprehensively model the effect of qubit loss on neutral-atom FTQC and develop a loss-tolerant transversal-gate architecture. We treat loss not as a predetermined error parameter but as a dynamic budget spent across a whole program, allowing us to control it by co-designing layout, compilation, and decoding. We target a physical implementation with no separate storage and entangling zones, eliminating the repeated SLM-AOD handoffs and long-distance shuttling that dominate loss in other layouts. We develop compiler optimizations that maximize gate parallelism while respecting the RF tone budget and AOD bandwidth constraints. Our work couples these with a loss-aware, delayed-erasure decoder and an end-to-end loss-aware magic state cultivation protocol. Overall, we improve accumulated loss per syndrome-extraction round by up to 2.15X against a zoned baseline and reduce logical error rates by over two orders of magnitude versus current architectures. Our framework also informs concrete device targets such as continuous reloading rates, AOD counts, and shuttling trajectory choices. We expect these insights to matter for system architects as neutral-atom hardware scales.
Measurement-free quantum error correction (MFQEC) offers an alternative to standard measurement-based QEC in platforms with an unconditional qubit reset gate. We revisit the question of fault tolerance (FT) for a measurement-free variant of the Steane code that leverages multiqubit gates and redundant syndrome extraction, finding previously overlooked phase-flip errors that undermine FT. We then construct a revised MFQEC circuit that is resistant to all single-qubit errors, but which nonetheless cannot tolerate certain correlated errors. In order to investigate FT systematically, we introduce an efficient method to classically simulate MFQEC circuits with (i) Clifford gates for syndrome extraction, (ii) syndrome-controlled Pauli operations for decoding, and (iii) a Pauli noise model. We thereby find a pseudothreshold of $\ensuremath{\sim}0.7%$ for our revised MFQEC Steane code under a restricted noise model previously considered in the literature. We then relax noise model assumptions to identify general requirements for FT with multiqubit gates, finding that existing multiqubit neutral atom gates are incompatible with fault-tolerant syndrome extraction in a straightforward implementation of both measurement-based and measurement-free variants of the Steane code. Decomposing multiqubit gates into two-qubit gates similarly spoils FT. Finally, we discuss the theoretical ingredients that are necessary to recover FT for MFQEC codes, including single-shot FT and a recent proposal by Heu\ss{}en et al. [arXiv:2307.13296] to achieve FT by ``copying'' errors onto an ancilla register. By combining multiqubit gates, redundant syndrome extraction, and copy-assisted FT, we construct a measurement-free and fault-tolerant variant of the Steane code with a pseudothreshold of $\ensuremath{\sim}0.1%$.
Fault-tolerant error-correction (FTEC) circuit is the foundation for achieving reliable quantum computation and remote communication. However, designing a fault-tolerant error correction scheme with a solid error-correction ability and low overhead remains a significant challenge. In this paper, a low-overhead fault-tolerant error correction scheme is proposed for quantum communication systems. Firstly, syndrome ancillas are prepared into Bell states to detect errors caused by channel noise. We propose a detection approach that reduces the propagation path of quantum gate fault and reduces the circuit depth by splitting the stabilizer generator into X-type and Z-type. Additionally, a syndrome extraction circuit is equipped with two flag qubits to detect quantum gate faults, which may also introduce errors into the code block during the error detection process. Finally, analytical results are provided to demonstrate the fault-tolerant performance of the proposed FTEC scheme with the lower overhead of the ancillary qubits and circuit depth.
Qubit loss errors constitute a dominant source of noise in many quantum hardware systems, particularly in neutral-atom quantum computers. We develop a theoretical framework to effectively detect and correct loss errors in logical algorithms and leverage such loss information in decoding. Considering general quantum error correction codes and logical circuits, we introduce a delayed-erasure decoder for experimentally motivated error models which leverages information from delayed loss detection to accurately correct loss errors, even when the precise moment of the error is unknown. Using this decoder, we identify strategies for detecting and correcting loss errors based on the logical circuit structure. For deep circuits prior to logical measurement, we explore methods to integrate loss detection into syndrome extraction with minimal overhead, identifying optimal strategies depending on the qubit loss fraction in the noise and hardware capabilities. In contrast, we find that many key algorithmic subroutines involve frequent gate teleportation, shortening the circuit depth before logical measurement and naturally replacing qubits with no additional experimental overhead. We simulate this setting using a toy model algorithm for small-angle synthesis and find a significant performance improvement as the loss fraction increases. These results provide a path forward for advancing large-scale fault-tolerant quantum computation in systems with loss error detection.