Quantum computers show promise to solve select problems otherwise intractable on classical computers. However, noisy intermediate-scale quantum (NISQ) era devices are currently prone to various sources of error. Quantum error correction (QEC) shows promise as a path towards fault tolerant quantum computing. Surface codes, in particular, have become ubiquitous throughout literature for their efficacy as a quantum error correcting code, and can execute quantum circuits via lattice surgery operations. Lattice surgery also allows for logical qubits to maneuver around the architecture, if there is space for it. Hardware used for near-term demonstrations have both spatially and temporally varying error results in logical qubits. By maneuvering logical qubits around the topology, an average logical error rate (LER) can be enforced. We propose cyclic qubit mappings (CQM), a dynamic remapping technique implemented during compilation to mitigate hardware heterogeneity by expanding and contracting logical qubits. In addition to LER averaging, CQM shows initial promise given it's minimal execution time overhead and effective resource utilization.
Quantum computers show promise to solve select problems otherwise intractable on classical computers. However, noisy intermediate-scale quantum (NISQ) era devices are currently prone to various sources of error. Quantum error correction (QEC) shows promise as a path towards fault tolerant quantum computing. Surface codes, in particular, have become ubiquitous throughout literature for their efficacy as a quantum error correcting code, and can execute quantum circuits via lattice surgery operations. Lattice surgery also allows for logical qubits to maneuver around the architecture, if there is space for it. Hardware used for near-term demonstrations have both spatially and temporally varying error results in logical qubits. By maneuvering logical qubits around the topology, an average logical error rate (LER) can be enforced. We propose cyclic qubit mappings (CQM), a dynamic remapping technique implemented during compilation to mitigate hardware heterogeneity by expanding and contracting logical qubits. In addition to LER averaging, CQM shows initial promise given it's minimal execution time overhead and effective resource utilization.
Study of the Issue Quantum error correction (QEC) is crucial yet incurs significant qubit overhead costs. The current QEC codes lack sufficient efficiency for near-term devices. The current generation of NISQ devices, which often rely on delicate nanostructured qubit architectures, is prone to noise, decoherence, and gate faults, which severely limit their computing capability and scalability. While traditional quantum error correction codes, such as the surface code, are theoretically resilient, they often require significant qubit overhead and complex management systems that exceed the hardware capabilities of NISQ-era devices. This raises the question of whether new, resource-efficient QEC strategies or hybrid error mitigation approaches can be tailored to the limits of nanostructured NISQ designs. This document examines the constraints of existing quantum error correction (QEC) codes, which are crucial for preserving the fidelity of quantum computations yet require substantial qubit resources. This study examines the shortcomings of current Quantum Error Correction (QEC) codes in relation to Noisy Intermediate-Scale Quantum (NISQ) devices and explores alternative strategies to create more efficient, low-overhead QEC frameworks appropriate for imminent quantum technologies.
Quantum error correction (QEC) represents a critical enabler for fault-tolerant quantum computing, protecting fragile quantum states from decoherence and operational errors. This paper provides a comprehensive analysis of leading quantum error correction schemes, focusing on surface codes and topological codes within the context of Noisy Intermediate-Scale Quantum (NISQ) era processors. We examine the theoretical foundations of stabilizer codes, compare surface code implementations with code distances ranging from d=3 to d=17, and analyze topological codes including toric codes and color codes. Our investigation encompasses syndrome extraction circuits, logical qubit encoding strategies, and threshold analysis for contemporary quantum hardware platforms. Performance metrics reveal that surface codes achieve error thresholds of approximately 1% with realistic noise models, while topological codes offer architectural advantages for specific qubit connectivity constraints. We discuss implementation challenges on current NISQ processors including IBM Quantum, Google Sycamore, and IonQ systems, addressing qubit overhead, gate fidelity requirements, and decoding algorithms. This analysis provides insights for selecting appropriate error correction schemes based on application requirements and hardware capabilities.
Fault-tolerant quantum computing (FTQC) is required to execute quantum algorithms capable of tackling computationally intractable problems in chemistry, material science, and cryptography. Noisy Intermediate-Scale Quantum (NISQ) devices remain constrained by physical error rates that degrade quantum coherence over short circuit depths. Quantum error correction (QEC) protects fragile logical states by encoding them into non-local degrees of freedom across topological physical qubit arrays. This research presents a comprehensive architectural and theoretical evaluation of three primary QEC paradigms: planar surface codes, topological color codes, and asymptotic quantum low-density parity-check (qLDPC) codes. We examine error thresholds, transversal gate constraints governed by the Eastin-Knill theorem, magic state distillation (MSD) overheads, lattice surgery, and classical decoding latencies across superconducting transmons, trapped ions, and neutral atom platforms.
Quantum systems operate using quantum bits (qubits), which are highly sensitive to external noises and disturbances and they are easily prone to errors. In the Noisy Intermediate-Scale Quantum (NISQ) era, these errors make difficult to build reliable, fault tolerant quantum circuits for real world deployment. This work provides an overview of need for Quantum Error Correction (QEC) in NISQ devices, as qubits commonly get affected by bit-flip, phase-flip, and combined errors that degrades system performance and examines Quantum Error Correction Code (QECC) techniques usage in communication, computation, and quantum multimedia applications such as image and video transmission. In addition, a simple three-qubit repetition circuit is introduced to demonstrate an error-mitigation approach. These findings, also show how QEC improves fidelity, reduces logical errors, and improves noise tolerance. The analysis also identifies challenges and outlines the future research direction aimed at achieving efficient and scalable fault tolerant quantum circuits.
Quantum systems operate using quantum bits (qubits), which are highly sensitive to external noises and disturbances and they are easily prone to errors. In the Noisy Intermediate-Scale Quantum (NISQ) era, these errors make difficult to build reliable, fault tolerant quantum circuits for real world deployment. This work provides an overview of need for Quantum Error Correction (QEC) in NISQ devices, as qubits commonly get affected by bit-flip, phase-flip, and combined errors that degrades system performance and examines Quantum Error Correction Code (QECC) techniques usage in communication, computation, and quantum multimedia applications such as image and video transmission. In addition, a simple three-qubit repetition circuit is introduced to demonstrate an error-mitigation approach. These findings, also show how QEC improves fidelity, reduces logical errors, and improves noise tolerance. The analysis also identifies challenges and outlines the future research direction aimed at achieving efficient and scalable fault tolerant quantum circuits.
Scalable quantum computation is expected to rely on fault-tolerant quantum computation (FTQC), in which quantum error correction (QEC) suppresses physical errors sufficiently to support reliable logical operations. This requires quantum compilation to move beyond general-purpose circuit optimization toward encoding-aware and protocol-structured compilation across the full stack of fault-tolerant quantum computers. Beyond circuit synthesis and hardware mapping, an FTQC compiler must lower algorithm-level operations into the logical gate set supported by the chosen code, coordinate encoded data and ancilla resources, realize logical operations together with repeated syndrome extraction under hardware constraints, and provide the resulting measurement stream to real-time decoding.
This survey presents a full-stack view of compiler design for QEC-protected quantum computation. We organize existing work into three interacting layers: logical-level QEC compilation, physical-level QEC realization, and decoder runtime integration. At the logical level, we review surface-code lattice-surgery compilers, beyond-surface-code code-surgery frameworks including emerging qLDPC approaches, and compilation support for non-Clifford operations such as magic-state distillation and code switching. At the physical level, we survey hardware-aware QEC realization on superconducting, trapped-ion, and neutral-atom platforms. We further examine decoder models, real-time decoding systems, and frame-management mechanisms that close the feedback loop during fault-tolerant execution. Finally, we identify open challenges in cross-layer optimization, qLDPC compilation, compiler-decoder co-design, runtime adaptivity, and the development of integrated and benchmarkable FTQC compilation stacks. An actively maintained paper list is available at: github.com/chenghongz/QEC-compiler-design.