When the gate set has continuous parameters, synthesizing a unitary operator as a quantum circuit is, in principle, always possible using exact methods. However, efficiently finding depth- and gate-minimal circuits remains a major challenge. The landscape is very different for compiled unitaries, which arise from programming and typically have short circuits, as compared with generic unitaries, which use all parameters and typically require circuits of maximal size. Previous approaches based on random combinatorial search indicate a low success rate even when the circuit ansatz is nominally adequately parameterized, motivating the use of heavily overparameterized circuits. In this work, we present a gradient-based optimization framework that enables the synthesis of depth- and gate-optimal circuits for generic unitaries without overparameterization, even under restricted hardware connectivity. We prescribe parameter-optimal circuit skeletons and eliminate the need for random combinatorial search. We further show that the poor performance of earlier random-search approaches can be attributed to the inadvertent selection of parameter-deficient circuit topologies. By systematically avoiding such skeletons, our approach achieves reliable convergence while maintaining parameter efficiency.
When the gate set has continuous parameters, synthesizing a unitary operator as a quantum circuit is, in principle, always possible using exact methods. However, efficiently finding depth- and gate-minimal circuits remains a major challenge. The landscape is very different for compiled unitaries, which arise from programming and typically have short circuits, as compared with generic unitaries, which use all parameters and typically require circuits of maximal size. Previous approaches based on random combinatorial search indicate a low success rate even when the circuit ansatz is nominally adequately parameterized, motivating the use of heavily overparameterized circuits. In this work, we present a gradient-based optimization framework that enables the synthesis of depth- and gate-optimal circuits for generic unitaries without overparameterization, even under restricted hardware connectivity. We prescribe parameter-optimal circuit skeletons and eliminate the need for random combinatorial search. We further show that the poor performance of earlier random-search approaches can be attributed to the inadvertent selection of parameter-deficient circuit topologies. By systematically avoiding such skeletons, our approach achieves reliable convergence while maintaining parameter efficiency.
This paper presents a deep reinforcement learning approach for synthesizing unitaries into quantum circuits. Unitary synthesis aims to identify a quantum circuit that represents a given unitary while minimizing circuit depth, total gate count, a specific gate count, or a combination of these factors. While past research has focused predominantly on continuous gate sets, synthesizing unitaries from the parameter-free Clifford+T gate set remains a challenge. Although the time complexity of this task will inevitably remain exponential in the number of qubits for general unitaries, reducing the runtime for simple problem instances still poses a significant challenge. In this study, we apply the tree-search method Gumbel AlphaZero to solve the problem for a subset of exactly synthesizable Clifford+T unitaries. Our method effectively synthesizes circuits for up to five qubits generated from randomized circuits with up to 60 gates, outperforming existing tools like QuantumCircuitOpt and MIN-T-SYNTH in terms of synthesis time for larger qubit counts. Furthermore, it surpasses Synthetiq in successfully synthesizing random, exactly synthesizable unitaries. These results establish a strong baseline for future unitary synthesis algorithms.
Quantum algorithms will likely play a key role in future high-performance-computing (HPC) environments. These algorithms are typically expressed as quantum circuits composed of arbitrary gates or as unitary matrices. Executing these on physical devices, however, requires translation to device-compatible circuits, in a process called quantum compilation or circuit synthesis, since these devices support a limited number of native gates. Moreover, these devices typically have specific qubit topologies, which constrain how and where gates can be applied. Consequently, logical qubits in input circuits and unitaries may need to be mapped to and routed between physical qubits. Furthermore, current Noisy Intermediate-Scale Quantum (NISQ) devices present additional constraints. They are vulnerable to errors during gate application and their short decoherence times lead to qubits rapidly succumbing to accumulated noise and possibly corrupting computations. Therefore, circuits synthesized for NISQ devices need to minimize gates and execution times. The problem of synthesizing device-compatible circuits, while optimizing for low gate count and short execution times, can be shown to be computationally intractable using analytical methods. Therefore, interest has grown towards heuristics-based synthesis techniques, which are able to produce approximations of the desired algorithm, while optimizing depth and gate-count. In this work, we investigate using genetic algorithms (GA)—a proven gradient-free optimization technique based on natural selection—for circuit synthesis. In particular, we formulate the quantum synthesis problem as a multi-objective optimization (MOO) problem, with the objectives of minimizing the approximation error, number of multi-qubit gates, and circuit depth. We also employ fuzzy logic for runtime parameter adaptation of GA to enhance search efficiency and solution quality in our proposed method.
Abstract Quantum circuit synthesis becomes increasingly challenging as system sizes grow and hardware-native gate sets diversify. Denoising diffusion models have recently been applied to quantum circuit synthesis as an alternative to expensive classical optimization. Existing diffusion-based approaches, however, either operate on discrete gate alphabets or separate gate identities and continuous parameters into different generative streams, which raises the question of whether a unified representation can more naturally encode structure–parameter dependencies. We propose a hybrid diffusion–optimization framework for quantum circuit synthesis with continuous native gates. Taking a trapped-ion-inspired native gate set as a representative example, our single-stream diffusion model operates directly on a continuous-parameter gate set { R X ( θ ), R Y ( θ ), R XX ( θ )} and produces fully parameterized circuits in a single diffusion sampling run. A lightweight gradient-based post-optimization of the continuous parameters, based on the process infidelity, then corrects residual stochastic errors. Trained and evaluated on random three-qubit unitaries, the model generates compact circuits that accurately approximate unseen targets. Under identical training conditions, the continuous-gate formulation achieves substantially lower process infidelity than both random-circuit and a discrete-gate diffusion baseline. Furthermore, applying gradient-based post-optimization to the continuous-gate diffusion output yields a significant additional improvement in fidelity compared with the same model without post-optimization, demonstrating that this refinement step is an effective strategy for correcting residual stochastic errors in the diffusion-generated parameters. These results point to a practical route toward continuous-parameter quantum circuit synthesis in native gate sets.
Gate-based quantum algorithms are typically implemented by circuits consisting of many single-qubit and multi-qubit gates operating on a quantum input state, followed by measurements of the output state. For certain quantum subroutines, such as initial state preparation and quantum Fourier transforms, explicit decompositions of the circuit in terms of single-qubit and two-qubit maximally entangling gates may exist. However, they often lead to large-depth circuits that are challenging for noisy intermediate-scale quantum (NISQ) hardware. Additionally, exact decompositions might only exist for some modular quantum circuits. Therefore, it is essential to find gate combinations that approximate these circuits to high fidelity with potentially low depth. Gradient-based optimization has been used to find such approximate decompositions. Still, these traditional optimizers often run into problems of slow convergence requiring many iterations, and performing poorly in the presence of noise, a factor that is especially relevant for NISQ hardware. Here we present iteratively preconditioned gradient descent (IPG) for optimizing quantum circuits and demonstrate performance speedups for state preparation and implementation of quantum algorithmic subroutines. IPG is a noise-resilient, higher-order algorithm that has shown promising gains in convergence speed for classical optimizations, converging locally at a linear rate for convex problems and superlinearly when the solution is unique. Specifically, we show an improvement in fidelity by a factor of 104for preparing a 4-qubit W state and a maximally entangled 5-qubit GHZ state with compared to other commonly used classical optimizers tuning the same ansatz. Such faster convergence with promise for noise-resilience could provide advantages for quantum algorithms on NISQ hardware, especially since the cost of running each iteration on a quantum computer is substantially higher than the classical optimizer step.
Abstract Efficiently compiling quantum operations remains a major bottleneck in scaling quantum computing. Today’s state-of-the-art methods achieve low compilation error by combining search algorithms with gradient-based parameter optimization, but they incur long runtimes and require multiple calls to quantum hardware or expensive classical simulations, making their scaling prohibitive. Recently, machine-learning models have emerged as an alternative, though they are currently restricted to discrete gate sets. Here, we introduce a multimodal denoising diffusion model that simultaneously generates a circuit’s structure and its continuous parameters for compiling a target unitary. It leverages two independent diffusion processes, one for discrete gate selection and one for parameter prediction. We benchmark the model over different experiments, analyzing the method’s accuracy across varying qubit counts and circuit depths, showcasing the ability of the method to outperform existing approaches in gate counts and under noisy conditions. Additionally, we show that a simple post-optimization scheme allows us to significantly improve the generated ansätze. Finally, by exploiting its rapid circuit generation, we create large datasets of circuits for particular operations and use these to extract valuable heuristics that can help us discover new insights into quantum circuit synthesis. Code and models are publicly available at https://github.com/FlorianFuerrutter/genQC .
Designing high-fidelity quantum circuits remains challenging, and current paradigms often depend on heuristic, fixed-ansatz structures or rule-based compilers that can be suboptimal or lack generality. We introduce a neuro-symbolic framework that reframes quantum circuit design as a differentiable logic programming problem. Our model represents a scaffold of potential quantum gates and parameterized operations as a set of learnable, continuous ``truth values'' or ``switches,'' s∈[0,1]N. These switches are optimized via standard gradient descent to satisfy a user-defined set of differentiable, logical axioms (e.g., correctness, simplicity, robustness). We provide a theoretical formulation bridging continuous logic (via T-norms) and unitary evolution (via geodesic interpolation), while addressing the barren plateau problem through biased initialization. We illustrate the approach on tasks including discovery of a 4-qubit Quantum Fourier Transform (QFT) from a scaffold of 21 candidate gates. We also report hardware-aware adaptation experiments on the 156-qubit IBM Fez processor, where the method autonomously adapted to both gradual noise drift (24.2~pp over static baseline) and catastrophic hardware failure (46.7~pp post-failure improvement), using only measurement-driven gradient updates with no hardwired bias or prior path preference