Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:2512.02516

Improved Ising Meson Spectroscopy Simulation on a Noisy Digital Quantum Device

Hao-Ti Hung, Isabel Nha Minh Le, Johannes Knolle, Ying-Jer Kao

quant-phcond-mat.str-elphysics.comp-phSubmitted Dec 2, 2025• Announced Dec 3, 2025• 0 citations
arXivHTMLPDF

Abstract

The transverse-field Ising model serves as a paradigm for studying confinement and excitation spectra, particularly the emergence of $E_8$ symmetry near criticality. However, experimentally resolving the Ising meson spectroscopy required to verify these symmetries is challenging on near-term quantum hardware due to the depth of circuits required for real-time evolution. Here, we demonstrate improved spectroscopy of confined excitations using two distinct error-resilient circuit construction techniques on the IBM Torino device: first-order Trotter decomposition utilizing native fractional gates, and a tensor-network-based circuit compression via Riemannian optimization. By analyzing the Fourier spectrum of error-mitigated time-series data, we successfully identify key signatures of $E_8$ symmetry despite hardware noise. These results validate the viability of both circuit compression and hardware-efficient compilation for probing complex topological phenomena on NISQ devices.

Comments
12 pages, 11 figures, 1 table

Related papers

Quantum simulation of many-body dynamics with noise-robust Trotter decomposition based on symmetric structures

Bo Yang, Naoki Negishi

The Suzuki–Trotter decomposition, which digitalizes quantum time evolution, provides a promising framework for simulating quantum dynamics on quantum hardware and exploring quantum advantage over classical computation. However, conventional Trotter circuits require a large number of non-local gates, lowering their faithfulness to the ideal dynamics when implemented on current noisy quantum hardware. While most previous studies have focused on circuit optimization, we instead propose a new Trotter decomposition that is intrinsically circuit-efficient for simulating quantum dynamics on near-term devices. Our method substantially reduces both the residual error by Trotter decomposition and the number of CNOT operations compared to conventional Trotter decompositions by exploiting the symmetry of the target model to construct an effective Hamiltonian with fewer two-qubit gates. We demonstrate the noise robustness of the proposed approach through numerical simulations of a nine-site Heisenberg model under realistic noise and further validate its experimental practicality on the IBM superconducting device, achieving a state fidelity exceeding 0.98 when combined with quantum error mitigation in the three-site case. The proposed circuit design is also compatible with existing circuit optimization techniques. Our results establish a practical route toward noise-resilient quantum simulation in many-body dynamics.

AVS Quantum Science•Feb 9, 2026•0 citations

Hardware-Efficient Hamiltonian Simulation via Trotter-Initialized Variational Optimization with Native Placement

F. S. Luiz, P. N. Ferreira, M. C. de Oliveira

Compiling time-evolution operators of the form $U(t)=e^{-iHt}$ into hardware-native gate sequences is a central bottleneck for digital quantum simulation on noisy intermediate-scale quantum (NISQ) devices. Generic transpilation treats $U(t)$ as an arbitrary unitary, discarding the structure of Hamiltonian dynamics and producing circuits whose depth exceeds hardware coherence limits. We introduce a structure-aware compilation framework that treats product-formula decompositions as synthesis primitives rather than simulation approximations. The method combines (i) native placement of Hamiltonian terms onto the hardware coupling map, (ii) adaptive selection of Trotter blocks via a greedy discretization procedure, and (iii) variational refinement using a Trotter-initialized ansatz. Across Heisenberg, Ising, and XY models with $n=3$--$8$ qubits, the compiled circuits achieve fidelities $F>0.996$ with approximately linear scaling in the number of entangling gates, while generic synthesis produces circuits that are orders of magnitude deeper. On IBM Torino hardware, we observe a regime in which shorter approximate circuits outperform deeper exact decompositions: a 27-CX circuit achieves higher hardware fidelity ($F_{\mathrm{hw}}=0.987$) than a 187-CX exact circuit. These results demonstrate that, in the NISQ regime, structure-aware approximate compilation can outperform exact structure-agnostic synthesis, providing a practical pathway for executing Hamiltonian dynamics without requiring pulse-level control.

quant-pharXiv:2604.26663•Advanced Quantum Technologies•Apr 30, 2026•0 citations

Quantum simulation of many-body dynamics with noise-robust Trotter decomposition based on symmetric structures

Bo Yang, Negishi, Naoki

The Suzuki-Trotter decomposition, which digitalizes quantum time evolution, provides a promising framework for simulating quantum dynamics on quantum hardware and exploring quantum advantage over classical computation. However, conventional Trotter circuits require a large number of non-local gates, lowering their faithfulness to the ideal dynamics when implemented on current noisy quantum hardware. While most previous studies have focused on circuit optimization, we instead propose a new Trotter decomposition that is intrinsically circuit-efficient for simulating quantum dynamics on near-term devices. Our method substantially reduces both the residual error by Trotter decomposition and the number of CNOT operations compared to conventional Trotter decompositions by exploiting the symmetry of the target model to construct an effective Hamiltonian with fewer two-qubit gates. We demonstrate the noise robustness of the proposed approach through numerical simulations of a nine-site Heisenberg model under realistic noise, and further validate its experimental practicality on the IBM superconducting device, achieving a state fidelity exceeding $0.98$ when combined with quantum error mitigation in the three-site case. The proposed circuit design is also compatible with existing circuit optimization techniques. Our results establish a practical route toward noise-resilient quantum simulation in many-body dynamics.

arXiv:2505.04552•May 7, 2025•0 citations

Symmetric Trotterization in digital quantum simulation of quantum spin dynamics

Yeonghun Lee

A higher-order Suzuki-Trotter decomposition or Trotterization can be exploited to mitigate the Trotter error in digital quantum simulation. This work revisits the second-order symmetric Trotterization in terms of the Trotter error, where quantum many-body spin dynamics of the transverse-field Ising model is simulated. While the work presents a pedagogical way to exploit a real quantum computer, the effectiveness of the symmetric Trotterization is evaluated in a prototype superconducting quantum device on IBM Quantum Experience. It turns out that the symmetric Trotterization does not provide higher accuracy than the first-order Trotterization in the testbed using the transverse-field Ising model. The result indicates that apart from the quantum errors, such as logical gate error and readout error, the use of a higher-order Trotterization should be circumspect, and the Trotter error would play an insignificant role in particular applications in an early stage of realized noisy intermediate-scale quantum (NISQ) devices.

quant-pharXiv:2603.07903•Journal of the Korean Physical Society•Mar 10, 2026•5 citations

Exploiting the Weyl-Chamber Structure for Hardware-Aware Quantum Circuit Compression

Neel Misciasci, Isabel Nha Minh Le, Christian B. Mendl

Quantum circuit compression based on tensor networks enables long-time simulation of quantum many-body dynamics on near-term hardware. While Riemannian optimization has been successfully employed for this purpose, it typically optimizes over the manifold of generic two-qubit unitaries. Consequently, the resulting gates must still be synthesized into the hardware's native gate set via KAK decomposition, an overhead that partially negates the original compression gain. We show that Riemannian-optimized gates already exhibit a predictable Weyl structure: near-$R_{ZZ}$ for the Ising model and near-fSim for the Heisenberg XXZ model. Building on this insight, we investigate whether parameterized optimization directly over the native gate set can offer a beneficial trade-off between expressivity and circuit efficiency by reducing the circuit's dimensionality. When comparing the two approaches, we find that the small residual Weyl parameters neglected by the latter are essential for high compression of the Ising propagator, whereas for the Heisenberg propagator, the native XXZ structure can be exploited directly to build a more efficient compressed circuit.

quant-pharXiv:2610.32812•Oct 26, 2026•0 citations

Deep Circuit Compression for Quantum Dynamics via Tensor Networks

Joe Gibbs, Łukasz Cincio

Dynamic quantum simulation is a leading application for achieving quantum advantage. However, high circuit depths remain a limiting factor on near-term quantum hardware. We present a compilation algorithm based on Matrix Product Operators for generating compressed circuits enabling real-time simulation on digital quantum computers, that for a given depth are more accurate than all Trotterizations of the same depth. By the efficient use of environment tensors, the algorithm is scalable in depth far beyond prior work, and we present circuit compilations of up to 64 layers of SU(4) gates. Surpassing only 1D circuits, our approach can flexibly target a particular quasi-2D gate topology. We demonstrate this by compiling a 52-qubit 2D Transverse-Field Ising propagator onto the IBM Heavy-Hex topology. For all circuit depths and widths tested, we produce circuits with smaller errors than all equivalent depth Trotter unitaries, corresponding to reductions in error by up to 4 orders of magnitude and circuit depth compressions with a factor of over 6.

arXiv:2409.16361•Quantum•Jul 9, 2025•4 citations
The transverse-field Ising model serves as a paradigm for studying confinement and excitation spectra, particularly the emergence of E8E_8E8​ symmetry near criticality. However, experimentally resolving the Ising meson spectroscopy required to verify these symmetries is challenging on near-term quantum hardware due to the depth of circuits required for real-time evolution. Here, we demonstrate improved spectroscopy of confined excitations using two distinct error-resilient circuit construction techniques on the IBM Torino device: first-order Trotter decomposition utilizing native fractional gates, and a tensor-network-based circuit compression via Riemannian optimization. By analyzing the Fourier spectrum of error-mitigated time-series data, we successfully identify key signatures of E8E_8E8​ symmetry despite hardware noise. These results validate the viability of both circuit compression and hardware-efficient compilation for probing complex topological phenomena on NISQ devices.
The Suzuki–Trotter decomposition, which digitalizes quantum time evolution, provides a promising framework for simulating quantum dynamics on quantum hardware and exploring quantum advantage over classical computation. However, conventional Trotter circuits require a large number of non-local gates, lowering their faithfulness to the ideal dynamics when implemented on current noisy quantum hardware. While most previous studies have focused on circuit optimization, we instead propose a new Trotter decomposition that is intrinsically circuit-efficient for simulating quantum dynamics on near-term devices. Our method substantially reduces both the residual error by Trotter decomposition and the number of CNOT operations compared to conventional Trotter decompositions by exploiting the symmetry of the target model to construct an effective Hamiltonian with fewer two-qubit gates. We demonstrate the noise robustness of the proposed approach through numerical simulations of a nine-site Heisenberg model under realistic noise and further validate its experimental practicality on the IBM superconducting device, achieving a state fidelity exceeding 0.98 when combined with quantum error mitigation in the three-site case. The proposed circuit design is also compatible with existing circuit optimization techniques. Our results establish a practical route toward noise-resilient quantum simulation in many-body dynamics.
Compiling time-evolution operators of the form U(t)=e−iHtU(t)=e^{-iHt}U(t)=e−iHt into hardware-native gate sequences is a central bottleneck for digital quantum simulation on noisy intermediate-scale quantum (NISQ) devices. Generic transpilation treats U(t)U(t)U(t) as an arbitrary unitary, discarding the structure of Hamiltonian dynamics and producing circuits whose depth exceeds hardware coherence limits. We introduce a structure-aware compilation framework that treats product-formula decompositions as synthesis primitives rather than simulation approximations. The method combines (i) native placement of Hamiltonian terms onto the hardware coupling map, (ii) adaptive selection of Trotter blocks via a greedy discretization procedure, and (iii) variational refinement using a Trotter-initialized ansatz. Across Heisenberg, Ising, and XY models with n=3n=3n=3--888 qubits, the compiled circuits achieve fidelities F>0.996F>0.996F>0.996 with approximately linear scaling in the number of entangling gates, while generic synthesis produces circuits that are orders of magnitude deeper. On IBM Torino hardware, we observe a regime in which shorter approximate circuits outperform deeper exact decompositions: a 27-CX circuit achieves higher hardware fidelity (Fhw=0.987F_{\mathrm{hw}}=0.987Fhw​=0.987) than a 187-CX exact circuit. These results demonstrate that, in the NISQ regime, structure-aware approximate compilation can outperform exact structure-agnostic synthesis, providing a practical pathway for executing Hamiltonian dynamics without requiring pulse-level control.
The Suzuki-Trotter decomposition, which digitalizes quantum time evolution, provides a promising framework for simulating quantum dynamics on quantum hardware and exploring quantum advantage over classical computation. However, conventional Trotter circuits require a large number of non-local gates, lowering their faithfulness to the ideal dynamics when implemented on current noisy quantum hardware. While most previous studies have focused on circuit optimization, we instead propose a new Trotter decomposition that is intrinsically circuit-efficient for simulating quantum dynamics on near-term devices. Our method substantially reduces both the residual error by Trotter decomposition and the number of CNOT operations compared to conventional Trotter decompositions by exploiting the symmetry of the target model to construct an effective Hamiltonian with fewer two-qubit gates. We demonstrate the noise robustness of the proposed approach through numerical simulations of a nine-site Heisenberg model under realistic noise, and further validate its experimental practicality on the IBM superconducting device, achieving a state fidelity exceeding 0.980.980.98 when combined with quantum error mitigation in the three-site case. The proposed circuit design is also compatible with existing circuit optimization techniques. Our results establish a practical route toward noise-resilient quantum simulation in many-body dynamics.
A higher-order Suzuki-Trotter decomposition or Trotterization can be exploited to mitigate the Trotter error in digital quantum simulation. This work revisits the second-order symmetric Trotterization in terms of the Trotter error, where quantum many-body spin dynamics of the transverse-field Ising model is simulated. While the work presents a pedagogical way to exploit a real quantum computer, the effectiveness of the symmetric Trotterization is evaluated in a prototype superconducting quantum device on IBM Quantum Experience. It turns out that the symmetric Trotterization does not provide higher accuracy than the first-order Trotterization in the testbed using the transverse-field Ising model. The result indicates that apart from the quantum errors, such as logical gate error and readout error, the use of a higher-order Trotterization should be circumspect, and the Trotter error would play an insignificant role in particular applications in an early stage of realized noisy intermediate-scale quantum (NISQ) devices.
Quantum circuit compression based on tensor networks enables long-time simulation of quantum many-body dynamics on near-term hardware. While Riemannian optimization has been successfully employed for this purpose, it typically optimizes over the manifold of generic two-qubit unitaries. Consequently, the resulting gates must still be synthesized into the hardware's native gate set via KAK decomposition, an overhead that partially negates the original compression gain. We show that Riemannian-optimized gates already exhibit a predictable Weyl structure: near-RZZR_{ZZ}RZZ​ for the Ising model and near-fSim for the Heisenberg XXZ model. Building on this insight, we investigate whether parameterized optimization directly over the native gate set can offer a beneficial trade-off between expressivity and circuit efficiency by reducing the circuit's dimensionality. When comparing the two approaches, we find that the small residual Weyl parameters neglected by the latter are essential for high compression of the Ising propagator, whereas for the Heisenberg propagator, the native XXZ structure can be exploited directly to build a more efficient compressed circuit.
Dynamic quantum simulation is a leading application for achieving quantum advantage. However, high circuit depths remain a limiting factor on near-term quantum hardware. We present a compilation algorithm based on Matrix Product Operators for generating compressed circuits enabling real-time simulation on digital quantum computers, that for a given depth are more accurate than all Trotterizations of the same depth. By the efficient use of environment tensors, the algorithm is scalable in depth far beyond prior work, and we present circuit compilations of up to 64 layers of SU(4) gates. Surpassing only 1D circuits, our approach can flexibly target a particular quasi-2D gate topology. We demonstrate this by compiling a 52-qubit 2D Transverse-Field Ising propagator onto the IBM Heavy-Hex topology. For all circuit depths and widths tested, we produce circuits with smaller errors than all equivalent depth Trotter unitaries, corresponding to reductions in error by up to 4 orders of magnitude and circuit depth compressions with a factor of over 6.