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arXiv:2409.16361 · Quantum

Deep Circuit Compression for Quantum Dynamics via Tensor Networks

Joe Gibbs, Łukasz Cincio

Published Jul 9, 2025• 4 citations
arXivHTMLPDF

Abstract

Dynamic quantum simulation is a leading application for achieving quantum advantage. However, high circuit depths remain a limiting factor on near-term quantum hardware. We present a compilation algorithm based on Matrix Product Operators for generating compressed circuits enabling real-time simulation on digital quantum computers, that for a given depth are more accurate than all Trotterizations of the same depth. By the efficient use of environment tensors, the algorithm is scalable in depth far beyond prior work, and we present circuit compilations of up to 64 layers of SU(4) gates. Surpassing only 1D circuits, our approach can flexibly target a particular quasi-2D gate topology. We demonstrate this by compiling a 52-qubit 2D Transverse-Field Ising propagator onto the IBM Heavy-Hex topology. For all circuit depths and widths tested, we produce circuits with smaller errors than all equivalent depth Trotter unitaries, corresponding to reductions in error by up to 4 orders of magnitude and circuit depth compressions with a factor of over 6.

DOI
10.22331/q-2025-07-09-1789

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Dynamic quantum simulation is a leading application for achieving quantum advantage. However, high circuit depths remain a limiting factor on near-term quantum hardware. We present a compilation algorithm based on Matrix Product Operators for generating compressed circuits enabling real-time simulation on digital quantum computers, that for a given depth are more accurate than all Trotterizations of the same depth. By the efficient use of environment tensors, the algorithm is scalable in depth far beyond prior work, and we present circuit compilations of up to 64 layers of SU(4) gates. Surpassing only 1D circuits, our approach can flexibly target a particular quasi-2D gate topology. We demonstrate this by compiling a 52-qubit 2D Transverse-Field Ising propagator onto the IBM Heavy-Hex topology. For all circuit depths and widths tested, we produce circuits with smaller errors than all equivalent depth Trotter unitaries, corresponding to reductions in error by up to 4 orders of magnitude and circuit depth compressions with a factor of over 6.
Abstract Quantum noise in real-world devices poses a significant challenge in achieving practical quantum advantage, since accurately compiled and executed circuits are typically deep and highly susceptible to decoherence. To facilitate the implementation of complex quantum algorithms on noisy hardware, we propose an approximate method for compiling target quantum circuits into brick-wall layouts. This new circuit design consists of two-qubit CNOT gates that can be directly implemented on real quantum computers, in conjunction with optimized one-qubit gates, to approximate the essential dynamics of the original circuit while significantly reducing its depth. Our approach is evaluated through numerical simulations of time-evolution circuits for the critical Ising model, quantum Fourier transformation, and Haar-random quantum circuits, as well as experiments on IBM quantum platforms. By accounting for compilation error and circuit noise, we demonstrate that time evolution and quantum Fourier transformation circuits achieve high compression rates, while random quantum circuits are less compressible. The degree of compression is related to the rate of entanglement accumulation in the target circuit. In particular, experiments on IBM platforms achieve a compression rate of 12.512.512.5 for N=12N=12N=12, significantly extending the application of current quantum devices. Furthermore, large-scale numerical simulations for system sizes up to N=30N=30N=30 reveal that the optimal depth dmaxd_{\rm max}dmax​ to achieve maximal overall fidelity is independent of system size NNN, suggesting the scalability of our method for large quantum devices in terms of quantum resources.
Abstract Dynamic simulation of materials is a promising application for near-term quantum computers. Current algorithms for Hamiltonian simulation, however, produce circuits that grow in depth with increasing simulation time, limiting feasible simulations to short-time dynamics. Here, we present a method for generating circuits that are constant in depth with increasing simulation time for a specific subset of one-dimensional (1D) materials Hamiltonians, thereby enabling simulations out to arbitrarily long times. Furthermore, by removing the effective limit on the number of feasibly simulatable time-steps, the constant-depth circuits enable Trotter error to be made negligibly small by allowing simulations to be broken into arbitrarily many time-steps. For an N -spin system, the constant-depth circuit contains only O(N2)\mathcal {O}(N^{2})O(N2) O ( N 2 ) CNOT gates. Such compact circuits enable us to successfully execute long-time dynamic simulation of ubiquitous models, such as the transverse field Ising and XY models, on current quantum hardware for systems of up to 5 qubits without the need for complex error mitigation techniques. Aside from enabling long-time dynamic simulations with minimal Trotter error for a specific subset of 1D Hamiltonians, our constant-depth circuits can advance materials simulations on quantum computers more broadly in a number of indirect ways.
Unitary evolution under a time-dependent Hamiltonian is a key component of simulation on quantum hardware. Synthesizing the corresponding quantum circuit is typically done by breaking the evolution into small time steps, also known as Trotterization, which leads to circuits the depth of which scales with the number of steps. When the circuit elements are limited to a subset of SU(4)SU(4)SU(4)---or equivalently, when the Hamiltonian may be mapped onto free fermionic models---several identities exist that combine and simplify the circuit. Based on this, we present an algorithm that compresses the Trotter steps into a single block of quantum gates using algebraic relations between adjacent circuit elements. This results in a fixed depth time evolution for certain classes of Hamiltonians. We explicitly show how this algorithm works for several spin models, and demonstrate its use for adiabatic state preparation of the transverse field Ising model.
We develop a block-encoding compiler that treats matrix product operators as compressed, virtual-path linear combination of unitaries programs. The compiler constructs conditional PREP and local SELECT stages directly from a parent matrix product operator, establishing tensor networks as structured quantum intermediate representations that can be efficiently compiled to block-encoded circuits. We apply the construction to real-time evolution in the Heisenberg chain and two perturbed Heisenberg-family models. Across the regimes studied, the compressed, approximately unitary propagator MPOs retain mild bond dimension and LCU normalization. Relative to an LCU that explicitly lists the O(NK)\mathcal{O}(N^K)O(NK) Pauli-product branches of an order-K truncated Taylor polynomial, our virtual-transition implementation replaces combinatorial branch enumeration by a circuit complexity scaling as O(αMPONχ2)\mathcal{O}(α_{\rm MPO}Nχ^2)O(αMPO​Nχ2), approaching O(Nχ2)\mathcal{O}(Nχ^2)O(Nχ2) when αMPOα_{\rm MPO}αMPO​ remains mild. We numerically characterize how truncation order, bond-dimension budget, and system size affect approximation error, normalization, and compiler cost. These results demonstrate how classically compressed tensor-network representations can serve as quantum compiler intermediate representations for block encoding and opens new avenues to accelerate quantum algorithms.
Near term quantum computers suffer from a degree of decoherence which is prohibitive for high fidelity simulations with deep circuits. An economical use of circuit depth is therefore paramount. For digital quantum simulation of quantum many-body systems, real time evolution is typically achieved by a Trotter decomposition of the time evolution operator into circuits consisting only of two qubit gates. To match the geometry of the physical system and the CNOT connectivity of the quantum processor, additional SWAP gates are needed. We show that optimal fidelity, beyond what is achievable by simple Trotter decompositions for a fixed gate count, can be obtained by compiling the evolution operator into optimal brickwall circuits for the S=1/2 S = 1 / 2 quantum Heisenberg model on chains and ladders, when mapped to one dimensional quantum processors without the need of additional SWAP gates.
Matrix product states provide efficient classical descriptions of quantum systems that may be useful as reference states for quantum algorithms such as quantum phase estimation and quantum-selected configuration interaction. Shallow circuit constructions for loading matrix product states onto quantum computers is necessary for this to be practical on near-term hardware. We present a decomposition of matrix product states to log-depth quantum circuits via a simple tree tensor network renormalisation procedure. Our method exposes an explicit parameter which can be used to trade a small amount of fidelity for large savings in circuit depth. We extend this decomposition to the case of matrix product operators allowing us to construct log-depth and ancilla-free circuits to calculate overlaps of the form ∣⟨φ∣U∣ψ⟩∣2\left |\langleφ|U|ψ\rangle\right |^2∣⟨φ∣U∣ψ⟩∣2. In particular, we demonstrate an interpretation of these circuits as \emph{verifier circuits} with application to circuit-level device calibration.