Efficient Floating-Point Arithmetic on Fault-Tolerant Quantum Computers
José E. Cruz Serrallés, Oluwadara Ogunkoya, Kürkçüo{g}lu, Do{g}a Murat, Nicholas Bornman, Norm M. Tubman, Anna Grassellino, Silvia Zorzetti, Riccardo Lattanzi
We propose a novel floating-point encoding scheme that builds on prior work involving fixed-point encodings. We encode floating-point numbers using Two's Complement fixed-point mantissas and Two's Complement integral exponents. We used our proposed approach to develop quantum algorithms for fundamental arithmetic operations, such as bit-shifting, reciprocation, multiplication, and addition. We prototyped and investigated the performance of the floating-point encoding scheme on quantum computer simulations by performing reciprocation on randomly drawn inputs and by solving first-order ordinary differential equations, while varying the number of qubits in the encoding. We observed rapid convergence to the exact solutions as we increased the number of qubits and a significant reduction in the number of ancilla qubits required for reciprocation when compared with similar approaches.
We propose a novel floating-point encoding scheme that builds on prior work involving fixed-point encodings. We encode floating-point numbers using Two's Complement fixed-point mantissas and Two's Complement integral exponents. We used our proposed approach to develop quantum algorithms for fundamental arithmetic operations, such as bit-shifting, reciprocation, multiplication, and addition. We prototyped and investigated the performance of the floating-point encoding scheme on quantum computer simulations by performing reciprocation on randomly drawn inputs and by solving first-order ordinary differential equations, while varying the number of qubits in the encoding. We observed rapid convergence to the exact solutions as we increased the number of qubits and a significant reduction in the number of ancilla qubits required for reciprocation when compared with similar approaches.
One of the major promises of quantum computing is the realization of SIMD (single instruction - multiple data) operations using the phenomenon of superposition. Since the dimension of the state space grows exponentially with the number of qubits, we can easily reach situations where we pay less than a single quantum gate per data point for data-processing instructions which would be rather expensive in classical computing. Formulating such instructions in terms of quantum gates, however, still remains a challenging task. Laying out the foundational functions for more advanced data-processing is therefore a subject of paramount importance for advancing the realm of quantum computing. In this paper, we introduce the formalism of encoding so called-semi-boolean polynomials. As it turns out, arithmetic Z/2nZ ring operations can be formulated as semi-boolean polynomial evaluations, which allows convenient generation of unsigned integer arithmetic quantum circuits. For arithmetic evaluations, the resulting algorithm has been known as Fourier-arithmetic. We extend this type of algorithm with additional features, such as ancilla-free in-place multiplication and integer coefficient polynomial evaluation. Furthermore, we introduce a tailormade method for encoding signed integers succeeded by an encoding for arbitrary floating-point numbers. This representation of floating-point numbers and their processing can be applied to any quantum algorithm that performs unsigned modular integer arithmetic. We discuss some further performance enhancements of the semi boolean polynomial encoder and finally supply a complexity estimation. The application of our methods to a 32-bit unsigned integer multiplication demonstrated a 90% circuit depth reduction compared to carry-ripple approaches.
There are several possible ways to encode random variables in a quantum state. The basis encoding of bit strings has paramount importance because it allows to load the values of a random variable through the superposition of corresponding basis states, and to then exploit quantum parallelism in processing algorithms. The basis encoding offers a natural way to represent an unsigned integer random variable, and extends to signed integers, as well as to fixed-point and floating-point variables. Each quantum representation of fractional numbers, however, involves a trade-off between accuracy and depth of manipulation circuits. Here, an efficient hybrid quantum-classical representation of quantum floating points is introduced. It combines a quantum register containing the values, with a classical register storing global information about the variable, namely the range and approximation tolerances. The sum and product operations are defined, in such a way as to ensure they are performed without overflow. By taking advantage of the stored classical information, the precision degradation that occurs due to rounding after repeated data manipulations, can be significantly reduced compared to known strategies. Ad hoc examples show up to around 90% reduction in approximation, compared to previous techniques, after repeated additions. The method finds application in many algorithms of practical relevance and constitutes a significant advance in the design of arithmetic circuits with low depth and high accuracy.
Implementation of floating-point arithmetic with consistent rounding is a critical component of many quantum algorithms. Quantum circuit implementations for squaring and division serve as examples here. This work was motivated by ongoing work in developing quantum algorithms for scientific and engineering computing applications, where this type of arithmetic often forms part of the algorithm. A key feature of the work is the use of a reduced-precision floating-point representation of real data specifically designed for near-term future quantum computing hardware with a limited number of qubits (e.g., less than 100) and with an increased level of fault tolerance as compared to current quantum computing hardware. The quantum circuit implementations of the squaring of a floating-point number and the division of two floating-point numbers are detailed here, highlighting similarities in the quantum circuit implementation for the logical steps required for rounding-to-nearest in line with the IEEE 754 standard for the two arithmetic operations. This similarity is an important feature regarding future work where an automated generation of this type of quantum circuit from a set of standard modules and circuit templates is employed.
Quantum computers, which process qubits, offer the promise of spectacular performance improvement over ordinary computers that deal only with classical bits, but there are obstacles to this vision. First, current quantum technology only allows a small number of qubits, and these are susceptible to noise. Second, quantum algorithms must be reversible, which often requires ancillary data that consume precious qubits. Third, interesting algorithms amenable to quantum implementation, such as chemistry simulation, require representing real numbers. Although quantum integer arithmetic has been studied extensively, the few works on quantum floating point demand more ancillary qubits than input data making floating point impractical for current quantum hardware. This paper suggests an alternative to floating point, known as the Logarithmic Number System (LNS), which has proven effective for approximate arithmetic with classical hardware. Reversible LNS multiplication and division are easy and exact with one ancillary qubit. Here we explore the quantum cost of difficult LNS operations (addition and subtraction). LNS offers implementation tradeoffs between accuracy and qubit cost that suggest highly-approximate LNS will be practical on quantum hardware sooner than when quantum technology has improved enough for floating-point to be practical.
The quantum adder is a vital arithmetic operation for quantum algorithms. However, the existing quantum floating-point adders only considered the case of two normal numbers. In this paper, we propose an enhanced quantum floating-point adder based on IEEE 754 standard. First, we divide quantum floating-point adders into four cases: the normal case, subnormal case, mixed case, and special case. Then, we propose a result-sign and mantissa-sign determining unit to avoid conversion from sign-magnitude to two complements. Moreover, we design a new quantum leading zero detector with the optimized T-depth and T-count. Comparison results reveal that the proposed floating-point adder has lower circuit width, T-depth, and T-count than the current works.
Reversible logic has applications in low-power computing and quantum computing. However, there are few existing designs for reversible floating-point adders and none suitable for quantum computation. In this article, we propose a resource-efficient reversible floating-point adder, suitable for binary quantum computation, improving the design of Nachtigal et al. [2011]. Our work focuses on improving the reversible designs of the alignment unit and the normalization unit, which are the most expensive parts. By changing a few elements of the existing algorithm, including the circuit designs of the RLZC (reversible leading zero counter) and converter, we have reduced the cost by about 68%. We also propose quantum designs adapted to use gates from fault-tolerant libraries. The KQ for our fault-tolerant design is almost 60 times as expensive as for a 32-bit fixed-point addition. We note that the floating-point representation makes in-place, truly reversible arithmetic impossible, requiring us to retain both inputs, which limits the sustainability of its use for quantum computation.