Qudits offer significant advantages over qubit-based architectures, including more efficient gate compilation, reduced resource requirements, improved error-correction primitives, and enhanced capabilities for quantum communication and cryptography. Yet, one of the most promising families of quantum error correction codes, namely quantum low-density parity-check (LDPC) codes, have so far been mostly restricted to qubits. Here, we generalize recent advancements in LDPC codes from qubits to qudits. We introduce a general framework for finding qudit LDPC codes and apply our formalism to several promising types of LDPC codes. We generalize bivariate bicycle codes, including their coprime variant; hypergraph product codes, including the recently proposed La-cross codes; subsystem hypergraph product (SHYPS) codes; high-dimensional expander codes, which make use of Ramanujan complexes; and fiber bundle codes. Using the qudit generalization formalism, we then numerically search for and decode several novel qudit codes compatible with near-term hardware. Our results highlight the potential of qudit LDPC codes as a versatile and hardware-compatible pathway toward scalable quantum error correction.
Qudits offer significant advantages over qubit-based architectures, including more efficient gate compilation, reduced resource requirements, improved error-correction primitives, and enhanced capabilities for quantum communication and cryptography. Yet, one of the most promising families of quantum error correction codes, namely quantum low-density parity-check (LDPC) codes, have so far been mostly restricted to qubits. Here, we generalize recent advancements in LDPC codes from qubits to qudits. We introduce a general framework for finding qudit LDPC codes and apply our formalism to several promising types of LDPC codes. We generalize bivariate bicycle codes, including their coprime variant; hypergraph product codes, including the recently proposed La-cross codes; subsystem hypergraph product (SHYPS) codes; high-dimensional expander codes, which make use of Ramanujan complexes; and fiber bundle codes. Using the qudit generalization formalism, we then numerically search for and decode several novel qudit codes compatible with near-term hardware. Our results highlight the potential of qudit LDPC codes as a versatile and hardware-compatible pathway toward scalable quantum error correction.
Quantum low-density parity-check (QLDPC) codes are an important class of quantum error-correcting codes that have low-weight stabilizer generators and typically offer encoding rates much higher than popular topological quantum codes such as surface and toric codes. While recent constructions of QLDPC codes have been aimed at two-level quantum systems, several hardware platforms for quantum computing, including superconducting and photonic systems, support a much larger Hilbert space. This makes the design of qudit-based quantum LDPC codes an issue of paramount significance in harnessing the increased flexibility afforded by high -dimensional quantum systems. In this paper, we forge the first steps in addressing this gap and explore the generalization of QLDPC constructions to qudit systems. We review two methods of generalizing binary quantum codes to qudit codes, namely, the stack and merge constructions, and investigate the application of these two meth-ods to the well-known hypergraph product and lifted-product codes. Subsequently, we provide upper and lower bounds for the encoding rates of the resulting qudit codes. We also prove an interesting relationship between the qudit hypergraph product and qudit lifted-product codes: the merge construction applied to the lifted product code is equivalent to the stack construction applied to the hypergraph product code under certain conditions. We evaluate the performance of these qudit codes under non-binary belief-propagation decoding and observe that qudit codes offer us a greater degree of flexibility in optimizing their rate-performance trade-off. We also demonstrate that, under certain conditions, qudit codes can simultaneously achieve higher rates and higher frame error rate (FER) performance than their binary counterparts.
Identifying the best families of quantum error correction (QEC) codes for near-term experiments is key to enabling fault-tolerant quantum computing. Ideally, such codes should have low overhead in qubit number, high physical error thresholds, and moderate requirements on qubit connectivity to simplify experiments, while allowing for high logical error suppression. Quantum low-density parity-check (LDPC) codes have been recently shown to provide a path towards QEC with low qubit overhead and small logical error probabilities. Here, we demonstrate that when the dominant errors are erasures, as can be engineered in different quantum computing architectures, quantum LDPC codes additionally provide high thresholds and even stronger logical error suppression in parameter regimes that are accessible to current experiments. Using large-scale QEC numerical simulations, we benchmark the performance of two families of high-rate quantum LDPC codes, namely the so-called Clifford-deformed La-cross codes and the bivariate bicycle codes, under a noise model strongly biased towards erasure errors. Both codes outperform the surface code by offering up to orders of magnitude lower logical error probabilities. Interestingly, we find that this decrease in the logical error probability may not be accompanied by an increase in the code threshold, as different QEC codes benefit differently from large erasure fractions. While here we focus on neutral atom qubits, the results also hold for other quantum platforms, such as trapped ions and superconducting qubits, for which erasure conversion has been demonstrated.
It is widely accepted that quantum error correction is essential for realizing large-scale fault-tolerant quantum computing. Recent experiments have demonstrated error correction codes operating below threshold, primarily using local planar codes such as the surface code and color code. In parallel, theoretical advances in quantum low-density parity-check (LDPC) codes promise significantly lower overheads, albeit at the cost of requiring non-local parity checks. While these results are encouraging, implementing such codes remains challenging for near-term experiments, creating obstacles to holistic benchmarking of hardware architectures capable of supporting long-range couplers. In this work, we present a simple construction recipe for small quantum LDPC codes based on recent developments in the field. Our codes are approximately twice as efficient as comparable surface codes, yet require only weight-four parity checks, which simplifies experimental realization compared to other quantum LDPC codes. We provide concrete proposals for implementations with superconducting qubits in flip-chip architectures and with semiconductor spin qubits using shuttling-based approaches.
Hypergraph product (HGP) codes are one of the most popular family of quantum low-density parity-check (LDPC) codes. Circuit-level simulations show that they can achieve the same logical error rate as surface codes with a reduced qubit overhead. They have been extensively optimized by importing classical techniques such as the progressive edge growth, or through random search, simulated annealing or reinforcement learning techniques. In this work, instead of machine learning (ML) algorithms that improve the code performance through local transformations, we impose additional global symmetries, that are hard to discover through ML, and we perform an exhaustive search. Precisely, we focus on the hypergraph product of two cyclic codes, which we call CxC codes and we study C2 codes which are the product a cyclic code with itself and CxR codes which are the product of a cyclic codes with a repetition code. We discover C2 codes and CxR codes that significantly outperform previously optimized HGP codes, achieving better parameters and a logical error rate per logical qubit that is up to three orders of magnitude better. Moreover, some C2 codes achieve simultaneously a lower logical error rate and a smaller qubit overhead than state-of-the-art LDPC codes such as the bivariate bicycle codes, at the price of a larger block length. Finally, leveraging the cyclic symmetry imposed on the codes, we design an efficient planar layout for the QCCD architecture, allowing for a trapped ion implementation of the syndrome extraction circuit in constant depth.
In fault-tolerant quantum computing, quantum algorithms are implemented through quantum circuits capable of error correction. These circuits are typically constructed based on specific quantum error correction codes, with consideration given to the characteristics of the underlying physical platforms. Optimizing these circuits within the constraints of today's quantum computing technologies, particularly in terms of error rates, qubit counts, and network topologies, holds substantial implications for the feasibility of quantum applications in the near future. This paper presents a toolkit for designing and analyzing fault-tolerant quantum circuits. We introduce a framework for representing stabilizer circuits using classical low-density parity-check (LDPC) codes. Each codeword in the representation corresponds to a quantum-mechanical equation regarding the circuit, formalizing the correlations utilized in parity checks and delineating logical operations within the circuit. Consequently, the LDPC code provides a means of quantifying fault tolerance and verifying logical operations. We outline the procedure for generating LDPC codes from circuits using the Tanner graph notation, alongside proposing graph-theory tools for constructing fault-tolerant quantum circuits from classical LDPC codes. These findings offer a systematic approach to applying classical error correction techniques in optimizing existing fault-tolerant protocols and developing new ones. As an example, we develop a resource-efficient scheme for universal fault-tolerant quantum computing on hypergraph product codes based on the LDPC representation.
We propose a decoder for quantum low density parity check (LDPC) codes based on a beam search heuristic guided by belief propagation (BP). Our beam search decoder applies to all quantum LDPC codes and achieves different speed-accuracy tradeoffs by tuning its parameters such as the beam width. We perform numerical simulations under circuit level noise for the [[144,12,12]] bivariate bicycle (BB) code at noise rate p=10−3 to estimate the logical error rate and the 99.9 percentile runtime and we compare with the BP-OSD decoder which has been the default quantum LDPC decoder for the past six years. A variant of our beam search decoder with a beam width of 64 achieves a 17× reduction in logical error rate. With a beam width of 8, we reach the same logical error rate as BP-OSD with a 26.2× reduction in the 99.9 percentile runtime. We identify the beam search decoder with beam width of 32 as a promising candidate for trapped ion architectures because it achieves a 5.6× reduction in logical error rate with a 99.9 percentile runtime per syndrome extraction round below 1ms at p=5×10−4. Remarkably, this is achieved in software on a single core, without any parallelization or specialized hardware (FPGA, ASIC), suggesting one might only need three 32-core CPUs to decode a trapped ion quantum computer with 1000 logical qubits.