Quantum low-density parity check (qLDPC) codes offer higher encoding rate than topological codes, e.g. surface codes, making them favourable for practical, fault-tolerant quantum computing with low overhead. These codes are particularly well-suited for fusion-based photonic implementations as this platform readily supports non-local connections. We propose an architecture specifically tailored to quantum emitters which can implement any Calderbank-Shor-Steane (CSS) qLDPC code. In this architecture, the photonic resource states are deterministically produced via quantum emitters and a conditional repeat-until-success strategy is incorporated to achieve high photon loss tolerance. We simulate small exemplary Bivariate Bicycle qLDPC codes and analyse the performance of our constructions under relevant physical noise mechanisms, including erasures due to fusion failure or photon loss, as well as Pauli errors. We obtain performances comparable with topological architectures though with significantly higher encoding rates.
Quantum low-density parity check (qLDPC) codes offer higher encoding rate than topological codes, e.g. surface codes, making them favourable for practical, fault-tolerant quantum computing with low overhead. These codes are particularly well-suited for fusion-based photonic implementations as this platform readily supports non-local connections. We propose an architecture specifically tailored to quantum emitters which can implement any Calderbank-Shor-Steane (CSS) qLDPC code. In this architecture, the photonic resource states are deterministically produced via quantum emitters and a conditional repeat-until-success strategy is incorporated to achieve high photon loss tolerance. We simulate small exemplary Bivariate Bicycle qLDPC codes and analyse the performance of our constructions under relevant physical noise mechanisms, including erasures due to fusion failure or photon loss, as well as Pauli errors. We obtain performances comparable with topological architectures though with significantly higher encoding rates.
Quantum low-density parity-check (qLDPC) codes are promising candidates for fault-tolerant quantum computation due to their high encoding rates and distances. However, implementing logical operations using qLDPC codes presents significant challenges. Previous research has demonstrated that self-dual qLDPC codes facilitate the implementation of transversal Clifford gates. Here we introduce a method for constructing self-dual qLDPC codes by stacking non-self-dual qLDPC codes. Leveraging this methodology, we develop double-chain bicycle codes, double-layer bivariate bicycle (BB) codes, double-layer twisted BB codes, and double-layer reflection codes, many of which exhibit favorable code parameters. Additionally, we conduct numerical calculations to assess the performance of these codes as quantum memory under the circuit-level noise model, revealing that the logical failure rate can be significantly reduced with high pseudo-thresholds.
High-rate quantum low-density parity-check (qLDPC) codes are a leading candidate for fault-tolerant quantum computing. They feature higher encoding rates than planar alternatives such as the surface code, but their implementation often entails significant hardware hurdles like the need for long-range couplers. We leverage the flexibility of a trapped-ion quantum computer to demonstrate nine quantum error-correcting codes with starkly different qubit connectivity requirements on a single device without any hardware reconfiguration. These experiments span three families of quantum error-correcting codes: qLDPC codes, topological codes, and concatenated codes. With a qLDPC code encoding 4 logical qubits into 18 physical qubits, we achieve a logical error rate up to 9× better than a previous demonstration of a similar code on superconducting solid-state qubits. Moreover, our implementation exhibits breakeven performance, with some instances achieving qubit lifetimes comparable to or slightly exceeding that of our trapped-ion qubits. We use a novel implementation of the optical-metastable-ground (OMG) architecture for addressable mid-circuit measurement and reset, which enables us to perform these experiments without any ion transport or dedicated coolant ions, requirements that typically consume a large fraction of the runtime or ion count of trapped-ion quantum computers.
Quantum low-density parity-check (qLDPC) codes are promising candidates for realizing large-scale fault-tolerant quantum computing. Although many codes with favorable theoretical parameters have been developed, their practical adoption must take hardware implementability into account. For mainstream quantum platforms such as superconductors and neutral atoms, the connectivity, the length of non-local couplings, and the complexity of wiring or atom rearrangement are key factors that dictate the difficulty of hardware realization. Here, we propose a new family of qLDPC codes, termed routing codes. Within this family, we find explicit instances whose encoding rates are competitive to those of bivariate bicycle (BB) codes, while systematically reducing qubit connectivity, shortening the length of non-local couplings, and, crucially, making all non-local couplings mutually parallel. This parallelism translates into quantifiable benefits, substantially reducing wiring crossings in superconducting multi-layer architectures and simplifying the scheduling of atom movement in neutral-atom arrays. The weight-7 routing codes maintain a high threshold of 0.7\% and reduce the physical qubit overhead by approximately a factor of 8, compared to surface codes achieving a same logical error rate. Further increasing the weight to 11 yields a [[200, 24, 14]] and [[200, 16, 17]] codes with an encoding rate over 23 times that of the surface code, at the cost of a higher logical error rate. These results establish routing codes as a hardware-centric qLDPC family that bridges the gap between theoretical optimality and near-term physical feasibility.
Quantum low-density parity-check (QLDPC) codes with good parameters are promising candidates for low-overhead fault-tolerant quantum computing, but their non-local stabilizers require long-range connectivity and frequent qubit movement, introducing practical challenges. Prior work has studied the networked implementation of topological codes, where each node only holds one or a few qubits of the entire code, and demonstrated competitive performance under practical constraints such as the quality of network-provided entanglement. However, since these codes are already geometrically local, such a networked setting might not be essential. In this work, we propose and study the networked implementation of better QLDPC codes, specifically bivariate bicycle codes due to their similarity to surface codes and the controlled amount of long-range connections in their stabilizers. We begin by recreating networked surface codes in Stim, with one code qubit per node, and provide additional insights into their circuit-level noise performance. We then extend this approach to bipartitions of bivariate bicycle codes, using balanced min-cut partitioning on their combined X-Z Tanner graph to identify optimal qubit splits. For stabilizers spanning nodes, we implement teleported CNOTs and vary the Bell pair fidelity enabling these gates. Through circuit-level noise simulations with BP-OSD decoding, we provide the first insights into networked realizations of these codes and compare their performance with monolithic implementations. We conclude by outlining advantages, limitations, and future directions.
Quantum repeater is the key technology enabler for long-distance quantum communication. To date, most of the existing quantum repeater protocols are designed based on specific quantum codes or graph states. In this paper, we propose a general framework for all-photonic one-way quantum repeaters based on the measurement-based error correction, which can be adapted to any Calderbank-Shor-Steane codes including the recently discovered quantum low density parity check (QLDPC) codes. We present a novel decoding scheme, where the error correction process is carried out at the destination based on the accumulated data from the measurements made across the network. This procedure not only outperforms the conventional protocols with independent repeaters but also simplifies the local quantum operations at repeaters. As an example, we numerically show that the [[48,6,8]] generalized bicycle code (as a small but efficient QLDPC code) has an equally good performance while reducing the resources by at least an order of magnitude.
Fusion-based quantum computation is a promising quantum computing model where small-sized photonic resource states are simultaneously entangled and measured by fusion gates. Such operations can be readily implemented with scalable photonic hardware: resource states can be deterministically generated by quantum emitters and fusions require only shallow linear-optical circuits. Here, we propose fusion-based architectures tailored to the capabilities and noise models in quantum emitters. We show that high tolerance to dominant physical error mechanisms can be achieved, with fault-tolerance thresholds of 8% for photon loss, 4% for photon distinguishability between emitters, and spin noise thresholds well above memory-induced errors for typical spin-photon interfaces. Our construction and analysis provide guidelines for the development of photonic quantum hardware targeting fault-tolerant applications with quantum emitters.