Classical simulations of quantum circuits play a vital role in the development of quantum computers and in taking the temperature of the field. Here, we classically simulate various physically-motivated circuits using 2D tensor network ansätze for the many-body wavefunction, which match the geometry of the underlying quantum processor. We employ a generalized boundary Matrix Product State contraction algorithm to controllably generate samples from the resultant tensor network states. Our approach systematically converges both the quality of the final state and the samples drawn from it to the true distribution defined by the circuit, with GPU hardware providing significant speedups over CPU hardware. Using these methods, we simulate the largest local unitary Jastrow ansatz circuit from recent IBM experiments to numerical precision. We also study a domain-wall quench in a 2D discrete-time Heisenberg model on large heavy-hex and rotated square lattices, reflecting IBM’s and Google’s latest processors, respectively. We observe a rapid buildup of complex loop correlations on the Google Willow geometry, which significantly impacts local properties of the system. Meanwhile, loop correlations build up extremely slowly on heavy-hex processors, with almost negligible impact even at large circuit depths. Our results underscore the role processor geometry plays in classical simulability.
Classical simulations of quantum circuits play a vital role in the development of quantum computers and in taking the temperature of the field. Here, we classically simulate various physically-motivated circuits using 2D tensor network ansätze for the many-body wavefunction, which match the geometry of the underlying quantum processor. We employ a generalized boundary Matrix Product State contraction algorithm to controllably generate samples from the resultant tensor network states. Our approach systematically converges both the quality of the final state and the samples drawn from it to the true distribution defined by the circuit, with GPU hardware providing significant speedups over CPU hardware. Using these methods, we simulate the largest local unitary Jastrow ansatz circuit from recent IBM experiments to numerical precision. We also study a domain-wall quench in a 2D discrete-time Heisenberg model on large heavy-hex and rotated square lattices, reflecting IBM’s and Google’s latest processors, respectively. We observe a rapid buildup of complex loop correlations on the Google Willow geometry, which significantly impacts local properties of the system. Meanwhile, loop correlations build up extremely slowly on heavy-hex processors, with almost negligible impact even at large circuit depths. Our results underscore the role processor geometry plays in classical simulability.
The study of quantum circuit simulation using classical computers is a key research topic that helps define the boundary of verifiable quantum advantage, solve quantum many-body problems, and inform development of quantum hardware and software. Tensor networks have become forefront mathematical tools for these tasks. Here we introduce a method to approximately simulate quantum circuits using sparsely-populated tensors. We describe a sparse tensor data structure that can represent quantum states with no underlying symmetry, and outline algorithms to efficiently contract and truncate these tensors. We show that the data structure and contraction algorithm are efficient, leading to expected runtime scalings versus qubit number and circuit depth. Our results motivate future research in optimization of sparse tensor networks for quantum simulation.
Efficient simulation of quantum circuits has become indispensable with the rapid development of quantum hardware. The primary simulation methods are based on state vectors and tensor networks. As the number of qubits and quantum gates grows larger in current quantum devices, traditional state-vector-based quantum circuit simulation methods prove inadequate due to the overwhelming size of the Hilbert space and extensive entanglement. Consequently, brutal force tensor network simulation algorithms become the only viable solution in such scenarios. The two main challenges faced in tensor network simulation algorithms are optimal contraction path finding and efficient execution on modern computing devices, with the latter determining the actual efficiency. In this study, we investigate the optimization of such tensor network simulations on modern GPUs and propose general optimization strategies from two aspects: computational efficiency and accuracy. First, we propose to transform critical Einstein summation operations into GEMM operations, leveraging the specific features of tensor network simulations to amplify the efficiency of GPUs. Second, by analyzing the data characteristics of quantum circuits, we employ extended precision to ensure the accuracy of simulation results and mixed precision to fully exploit the potential of GPUs, resulting in faster and more precise simulations. Our numerical experiments demonstrate that our approach can achieve a 3.96× reduction in verification time for random quantum circuit samples in the 18-cycle case of Sycamore, with sustained performance exceeding 21 TFLOPS on one A100. This method can be easily extended to the 20-cycle case, maintaining the same performance, accelerating by 12.5× compared to the state-of-the-art CPU-based results and 4.48–6.78× compared to the state-of-the-art GPU-based results reported in the literature. Furthermore, the strategies presented in this article hold general applicability for accelerating problems that can be tackled by contracting tensor networks such as graphical models and combinatorial optimizations.
We show how quantum-inspired 2D tensor networks can be used to efficiently and accurately simulate the largest quantum processors from IBM, namely Eagle (127 qubits), Osprey (433 qubits), and Condor (1121 qubits). We simulate the dynamics of a complex quantum many-body system—specifically, the kicked Ising experiment considered recently by IBM in Y. Kim , —using graph-based projected entangled pair states (gPEPS), which was proposed by some of us in . Our results show that simple tensor updates are already sufficient to achieve very large unprecedented accuracy with remarkably low computational resources for this model. Apart from simulating the original experiment for 127 qubits, we also extend our results to 433 and 1121 qubits, and for evolution times around eight times longer, thus setting a benchmark for the newest IBM quantum machines. We also report accurate simulations for infinitely many qubits. Our results show that gPEPS are a natural tool to efficiently simulate quantum computers with an underlying lattice-based qubit connectivity, such as all quantum processors based on superconducting qubits. Published by the American Physical Society 2024
Dynamic quantum simulation is a leading application for achieving quantum advantage. However, high circuit depths remain a limiting factor on near-term quantum hardware. We present a compilation algorithm based on Matrix Product Operators for generating compressed circuits enabling real-time simulation on digital quantum computers, that for a given depth are more accurate than all Trotterizations of the same depth. By the efficient use of environment tensors, the algorithm is scalable in depth far beyond prior work, and we present circuit compilations of up to 64 layers of SU(4) gates. Surpassing only 1D circuits, our approach can flexibly target a particular quasi-2D gate topology. We demonstrate this by compiling a 52-qubit 2D Transverse-Field Ising propagator onto the IBM Heavy-Hex topology. For all circuit depths and widths tested, we produce circuits with smaller errors than all equivalent depth Trotter unitaries, corresponding to reductions in error by up to 4 orders of magnitude and circuit depth compressions with a factor of over 6.
Abstract Tensor networks (TNs) are a family of computational methods built on graph-structured factorizations of large tensors, which have long represented state-of-the-art methods for the approximate simulation of complex quantum systems on classical computers. The rapid pace of recent advancements in numerical computation, notably the rise of GPU and TPU hardware accelerators, have allowed TN algorithms to scale to even larger quantum simulation problems, and to be employed more broadly for solving machine learning tasks. The ‘quantum-inspired’ nature of TNs permits them to be mapped to parametrized quantum circuits (PQCs), a fact which has inspired recent proposals for enhancing the performance of TN algorithms using near-term quantum devices, as well as enabling joint quantum–classical training frameworks that benefit from the distinct strengths of TN and PQC models. However, the success of any such methods depends on efficient and accurate methods for approximating TN states using realistic quantum circuits, which remains an unresolved question. This work compares a range of novel and previously-developed algorithmic protocols for decomposing matrix product states (MPS) of arbitrary bond dimension into low-depth quantum circuits consisting of stacked linear layers of two-qubit unitaries. These protocols are formed from different combinations of a preexisting analytical decomposition method together with constrained optimization of circuit unitaries, with initialization by the former method helping to avoid poor-quality local minima in the latter optimization process. While all of these protocols have efficient classical runtimes, our experimental results reveal one particular protocol employing sequential growth and optimization of the quantum circuit to outperform all others, with even greater benefits in the setting of limited computational resources. Given these promising results, we expect our proposed decomposition protocol to form a useful ingredient within any joint application of TNs and PQCs, further unlocking the rich and complementary benefits of classical and quantum computation.
Quantum computer simulators are an indispensable tool for prototyping quantum algorithms and verifying the functioning of existing quantum computer hardware. The current largest quantum computers feature more than one thousand qubits, challenging their classical simulators. Statevector quantum simulators are challenged by the exponential increase of representable quantum states with respect to the number of qubits, making more than fifty qubits practically unfeasible. A more appealing approach for simulating quantum computers is adopting the tensor network approach, whose memory requirements fundamentally depend on the level of entanglement in the quantum circuit, and allows simulating the current largest quantum computers. This work investigates and evaluates the CUDA-Q tensor network simulators on an Nvidia Grace Hopper system, particularly the Matrix Product State (MPS) formulation. We compare the performance of the CUDA-Q state vector implementation and validate the correctness of MPS simulations. Our results highlight that tensor network-based methods provide a significant opportunity to simulate large-qubit circuits, albeit approximately. We also show that current GPUaccelerated computation cannot fully utilize GPU efficiently in the case of MPS simulations.