Quantum Error Detection in Qubit-Resonator Star Architecture
Florian Vigneau, Sourav Majumder, Aniket Rath, Pedro Parrado-Rodríguez, Francisco Revson F. Pereira, Hsiang-Sheng Ku, Fedor Šimkovic, Stefan Pogorzalek, Tyler Jones, Nicola Wurz, Michael Renger, Jeroen Verjauw, Ping Yang, William Kindel, Frank Deppe, Johannes Heinsoo
Achieving industrial quantum advantage is unlikely without the use of quantum error correction (QEC). Other QEC codes beyond surface code are being experimentally studied, such as color codes and quantum low-density parity check codes, that could benefit from new quantum processing unit (QPU) architectures. We introduce the six-qubit star lattice architecture that offers parallelism and effective local all-to-all connectivity and thus enables hardware-efficient implementation of certain QEC codes. As a first demonstration of this new architecture, we encode two logical qubits in a six-qubit superconducting QPU with a star topology using the ⟦ 4 , 2 , 2 ⟧ code and characterize the logical states with the classical shadow framework. Logical lifetime and logical error rate are measured over repeated quantum error detection cycles for various logical states including a logical Bell state. We measure logical state fidelities above 96% for every cardinal logical state, find logical lifetimes above the best physical element, and logical error-per-cycle values ranging from 0.25(2)% to 0.91(3)%. In future, such star units can be tiled into a lattice to enable QEC codes with high-weight and overlapping stabilizers for improved encoding rates.
Achieving industrial quantum advantage is unlikely without the use of quantum error correction (QEC). Other QEC codes beyond surface code are being experimentally studied, such as color codes and quantum low-density parity check codes, that could benefit from new quantum processing unit (QPU) architectures. We introduce the six-qubit star lattice architecture that offers parallelism and effective local all-to-all connectivity and thus enables hardware-efficient implementation of certain QEC codes. As a first demonstration of this new architecture, we encode two logical qubits in a six-qubit superconducting QPU with a star topology using the ⟦ 4 , 2 , 2 ⟧ code and characterize the logical states with the classical shadow framework. Logical lifetime and logical error rate are measured over repeated quantum error detection cycles for various logical states including a logical Bell state. We measure logical state fidelities above 96% for every cardinal logical state, find logical lifetimes above the best physical element, and logical error-per-cycle values ranging from 0.25(2)% to 0.91(3)%. In future, such star units can be tiled into a lattice to enable QEC codes with high-weight and overlapping stabilizers for improved encoding rates.
Current quantum processors are fragile, noisy and fairly limited in both quantity and quality with tens of qubits and physical error rates of around 10^-3. To realize practical quantum applications, however, error rates need to be below 10^-15 across millions of qubits. To bridge this gap and fully harness the potential of quantum computers, quantum error correction (QEC) is essential. QEC codes are designed to protect quantum information by redundantly encoding it onto multiple physical qubits. This encoding allows for the detection and correction of local errors affecting individual qubits, e.g., through stabilizer measurements. Importantly, if the physical error rates are below a specific threshold, QEC codes can exponentially suppress logical error rates by increasing the number of physical qubits involved. This is essential for achieving fault-tolerant computations, which are key to unlocking the full potential of quantum computers. The work presented in this thesis focuses on the implementation and optimization of small-scale QEC experiments using the surface code and flux-tunable superconducting qubits (Transmons). It addresses several key challenges: enhancing two-qubit gate fidelity in Surface-4 (Chapter 2), implementing an error-detection code with Surface-7 (Chapter 3), automating the calibration and benchmarking of the building blocks in Surface-17 (Chapter 4), reducing leakage into higher excited states with leakage reduction units (Chapter 5), assessing and enhancing the performance of logical qubits (Chapters 7 and 8).
Fault-tolerant quantum computing (FTQC) is required to execute quantum algorithms capable of tackling computationally intractable problems in chemistry, material science, and cryptography. Noisy Intermediate-Scale Quantum (NISQ) devices remain constrained by physical error rates that degrade quantum coherence over short circuit depths. Quantum error correction (QEC) protects fragile logical states by encoding them into non-local degrees of freedom across topological physical qubit arrays. This research presents a comprehensive architectural and theoretical evaluation of three primary QEC paradigms: planar surface codes, topological color codes, and asymptotic quantum low-density parity-check (qLDPC) codes. We examine error thresholds, transversal gate constraints governed by the Eastin-Knill theorem, magic state distillation (MSD) overheads, lattice surgery, and classical decoding latencies across superconducting transmons, trapped ions, and neutral atom platforms.
Quantum error correction (QEC) [1,2] is essential for the realization of large-scale quantum computers [3,4]. However, due to the complexity of operating on the encoded ‘logical’ qubits [5,6], understanding the physical principles for building fault-tolerant quantum devices and combining them into efficient architectures is an outstanding scientific challenge. Here we utilize reconfigurable arrays of up to 448 neutral atoms to implement the key elements of a universal, fault-tolerant quantum processing architecture and experimentally explore their underlying working mechanisms. We first employ surface codes to study how repeated QEC suppresses errors [6,7], demonstrating 2.14(13)x below-threshold performance in a four-round characterization circuit by leveraging atom loss detection and machine learning decoding [8,9]. We then investigate logical entanglement using transversal gates and lattice surgery [10–12], and extend it to universal logic through transversal teleportation with 3D [[15,1,3]] codes [13,14], enabling arbitrary-angle synthesis with polylogarithmic overhead [5,15]. Finally, we develop mid-circuit qubit re-use [16], increasing experimental cycle rates by two orders of magnitude and enabling deep-circuit protocols with dozens of logical qubits and hundreds of logical teleportations [17–20] with [[7,1,3]] and high-rate [[16,6,4]] codes while maintaining constant internal entropy. Our experiments reveal key principles for efficient architecture design, involving the interplay between quantum logic & entropy removal, judiciously using physical entanglement in logic gates & magic state generation, and leveraging teleportations for universality & physical qubit reset. These results establish foundations for scalable, universal error-corrected processing and its practical implementation with neutral atom systems.
Quantum Error Correction (QEC) is essential for future quantum computers due to its ability to exponentially suppress physical errors. The surface code is a leading error-correcting code candidate because of its local topological structure, experimentally achievable thresholds, and support for universal gate operations with magic states. However, its physical overhead scales quadratically with number of correctable errors. Conversely, quantum low-density parity-check (qLDPC) codes offer superior scaling but lack, on their own, a clear path to universal logical computation. Therefore, it is becoming increasingly evident is becoming that there are significant advantages to designing architectures using multiple codes. Heterogeneous architectures provide a clear path to universal logical computation as well as the ability to access different resource trade offs. To address this, we propose integrating the surface code and gross code using an ancilla bus for inter-code data movement. This approach involves managing trade-offs, including qubit overhead, a constrained instruction set, and gross code (memory) routing and management. While our focus is on the gross-surface code architecture, our method is adaptable to any code combination and the constraints generated by that specific architecture. Motivated by the potential reduction of physical qubit overhead, an ever important feature in the realization of fault tolerant computation, we perform the first full system study of heterogeneous error-correcting codes, discovering architectural trade-offs and optimizing around them. We demonstrate physical qubit reductions of up to 6.42x when executing an algorithm to a specific logical error rate, at the cost of up to a 3.43x increase in execution time.
Abstract Practical quantum computing will require error rates well below those achievable with physical qubits. Quantum error correction 1,2 offers a path to algorithmically relevant error rates by encoding logical qubits within many physical qubits, for which increasing the number of physical qubits enhances protection against physical errors. However, introducing more qubits also increases the number of error sources, so the density of errors must be sufficiently low for logical performance to improve with increasing code size. Here we report the measurement of logical qubit performance scaling across several code sizes, and demonstrate that our system of superconducting qubits has sufficient performance to overcome the additional errors from increasing qubit number. We find that our distance-5 surface code logical qubit modestly outperforms an ensemble of distance-3 logical qubits on average, in terms of both logical error probability over 25 cycles and logical error per cycle ((2.914 ± 0.016)% compared to (3.028 ± 0.023)%). To investigate damaging, low-probability error sources, we run a distance-25 repetition code and observe a 1.7 × 10 −6 logical error per cycle floor set by a single high-energy event (1.6 × 10 −7 excluding this event). We accurately model our experiment, extracting error budgets that highlight the biggest challenges for future systems. These results mark an experimental demonstration in which quantum error correction begins to improve performance with increasing qubit number, illuminating the path to reaching the logical error rates required for computation.
Quantum Error Correction (QEC) is essential for future quantum computers due to its ability to exponentially suppress physical errors. The surface code is a leading error-correcting code candidate because of its local topological structure, experimentally achievable thresholds, and support for universal gate operations with magic states. However, its physical overhead scales quadratically with number of correctable errors. Conversely, quantum low-density parity-check (qLDPC) codes offer superior scaling but lack, on their own, a clear path to universal logical computation. Therefore, it is becoming increasingly evident that there are significant advantages to designing architectures using multiple codes. Heterogeneous architectures provide a clear path to universal logical computation as well as the ability to access different resource trade offs.