Quantum search algorithms, such as Grover's algorithm, will soon pose a threat to current encryption standards as quantum computing advances toward practical implementation. These algorithms rely on quantum circuits that map cryptographic algorithms into appropriate Hilbert spaces, thus linking algorithmic inputs and outputs through quantum superposition. However, implementing and testing such circuits on existing quantum simulators, such as Qiskit, encounters significant memory and computational bottlenecks that limit research progress. To address these simulation constraints, we present a resource-optimized quantum circuit implementation of a complete two-round Mini-AES encryption algorithm. Our approach systematically converts the cipher's algebraic structure using algebraic normal form (ANF) equations, mapping XOR operations to CNOT gates and AND operations to Toffoli gates. To reduce memory overhead, we implement an ancilla-reuse strategy utilizing mid-circuit measurements and resets. Additionally, we introduce an automated procedure that generates Qiskitcompatible quantum circuits for arbitrary S-boxes and cryptographic primitives, streamlining the development of quantum cryptanalysis implementations. Our implementation achieves full encryption and decryption in a quantum circuit with modest gate requirements that can be achieved by the current or near-future state of the art quantum computers. In addition, we provide system utilization metrics to validate our resource-constrained implementation. This compact and pedagogically accessible implementation establishes a practical foundation for quantum cryptanalysis research and post-quantum cryptographic analysis.
Quantum search algorithms, such as Grover's algorithm, will soon pose a threat to current encryption standards as quantum computing advances toward practical implementation. These algorithms rely on quantum circuits that map cryptographic algorithms into appropriate Hilbert spaces, thus linking algorithmic inputs and outputs through quantum superposition. However, implementing and testing such circuits on existing quantum simulators, such as Qiskit, encounters significant memory and computational bottlenecks that limit research progress. To address these simulation constraints, we present a resource-optimized quantum circuit implementation of a complete two-round Mini-AES encryption algorithm. Our approach systematically converts the cipher's algebraic structure using algebraic normal form (ANF) equations, mapping XOR operations to CNOT gates and AND operations to Toffoli gates. To reduce memory overhead, we implement an ancilla-reuse strategy utilizing mid-circuit measurements and resets. Additionally, we introduce an automated procedure that generates Qiskitcompatible quantum circuits for arbitrary S-boxes and cryptographic primitives, streamlining the development of quantum cryptanalysis implementations. Our implementation achieves full encryption and decryption in a quantum circuit with modest gate requirements that can be achieved by the current or near-future state of the art quantum computers. In addition, we provide system utilization metrics to validate our resource-constrained implementation. This compact and pedagogically accessible implementation establishes a practical foundation for quantum cryptanalysis research and post-quantum cryptographic analysis.
Key recovery attack on SPN ciphers such as AES is NP hard in complexity. Previous studies have estimated the quantum resources required for implementing Grover’s key search for AES, but these are largely theoretical in nature. The key challenges to implement Grover’s algorithm on current quantum hardware include the number of available qubits, noise, and decoherence. However, the rapid advancement of hardware has brought us closer to practical realization for the cryptanalysis of light-weight SPN ciphers. This study presents an efficient quantum circuit implementation of Mini-AES, a 16-bit variant of AES, employing standard CNOT and Toffoli gates. To the best of our knowledge, our work provides the first complete quantum implementations of all core Mini-AES components for the quantum oracle. The effects of noise are emulated for each module of the quantum oracle and quantified. Furthermore, Grover’s algorithm is applied to Mini-AES to perform successful key recovery through a known-plaintext attack, demonstrating significant amplitude amplification while using near-optimal Grover’s iterations, thereby reducing the total quantum volume. The optimal Grover’s iterations have been obtained empirically as well as validated with finite-shot analysis. Notably, the application of Grover’s algorithm reveals key clustering behavior in Mini-AES, which has been corroborated through classical simulation.
The Advanced Encryption Standard (AES) is one of the most widely used symmetric block cipher cryptography algorithms. Simplified-AES (S-AES) retains the structural framework of AES, making it an ideal model for elucidating the mechanism of symmetric cryptography. In this paper, we investigate potential quantum attacks on S-AES, utilizing both Grover-based algorithms and variational quantum algorithms (VQAs). For Grover-based attacks, we introduce an optimized oracle for implementing S-AES, reducing the complexity from 160 Toffoli gates to 120 by refining the SubNibble operation. Additionally, we propose a general Variational Quantum Attack Algorithm (VQAA) for any type of symmetric encryption that does not require the quantum implementation of the encryption procedure, which reduces the gate complexity substantially. These improvements enable the implementation of both Grover-based attacks and VQAA on superconducting quantum computers. The results demonstrate the feasibility of cryptographic analysis on currently available quantum hardware. Our findings also underscore the challenges of parameter optimization for S-AES, attributing the difficulty to the design of efficient parameterized quantum circuits, which constrain the effectiveness of variational algorithms. Despite these advancements, significant challenges remain in achieving quantum attacks on AES.
With the advancement of quantum computing, quantum circuit implementations of symmetric cryptographic algorithms are essential for evaluating their resistance to quantum attacks. As an ISO-standardized cipher, the efficient quantum circuit construction of Camellia is of great significance. Focusing on minimizing the DW-cost (qubits × Toffoli-depth) while balancing ancilla qubits and Toffoli-depth, this paper proposes an optimized quantum circuit design for Camellia. Specifically: (1) using a serial-multiplication and out-of-place inversion architecture under composite-field decomposition, combined with hierarchical screening for parallelizing bilinear multiplications, a compact in-place S-box quantum circuit is constructed with a DW-cost of 276, 28% lower than the state of the art; (2) a low-gate-count linear-layer circuit is obtained via heuristic search, and gate-sequence reordering then reduces the full depth from 9 to 7 without increasing the gate count; (3) Camellia-128/192/256 quantum circuits are constructed with DW-costs of 119,168, 257,664, and 257,664, achieving reductions of 48%, 52%, and 52% respectively over prior work. A pipelined Grover oracle is further designed and the total resources required for a full Grover search attacking Camellia are evaluated. For Camellia-128, the complete Grover search requires a T-depth of 2.10 × 2⁷⁶ and a total TDW-cost (qubits × T-depth) of 1.00 × 2⁸⁶, reducing T-depth by 75% and TDW-cost by 84% over prior work. The first full Grover search resource estimates for Camellia-192/256 are also presented, with T-depths of 7.20 × 2¹⁰⁸ and 8.11 × 2¹⁴⁰ and TDW-costs of 2.03 × 2¹²³ and 2.79 × 2¹⁵³, respectively. These results show that Grover's attack on Camellia requires fewer quantum resources than on AES at the 128-bit level, implying comparatively weaker post-quantum security at that key size, while the picture reverses at larger key sizes (Section 4).
Quantum computing poses a significant threat to classical cryptographic algorithms, particularly the Advanced Encryption Standard (AES). This study investigates the impact of Grover's algorithm on the AES S-box, a fundamental component of the AES encryption process. By leveraging quantum mechanics, Grover's algorithm can potentially reduce the time required to break AES encryption from 2128operations to 264operations, thus presenting a substantial security risk. This research aims to evaluate the feasibility of such quantum attacks on AES S-box by conducting experiments using virtual quantum simulators. The study examines the resource requirements, including the number of gates and qubits, and assesses the scalability of Grover's algorithm across different data sizes and types. The findings indicate that, while theoretically effective, the practical implementation of Grover's algorithm is currently hindered by significant resource constraints on existing quantum hardware. These results underscore the need for continued advancements in quantum technology and the development of quantum-resistant cryptographic methods to ensure data security in the quantum era. This research contributes to the understanding of quantum vulnerabilities in classical cryptography and supports the development of robust encryption strategies that can withstand future quantum attacks.
Abstract Quantum computing poses a significant threat to modern cryptosystems, prompting nations to initiate the development of next-generation cryptographic algorithms where quantum security assessment constitutes a critical task. In this work, we present the first complete quantum attack circuit construction and security evaluation of quantum resistance for the authenticated encryption algorithm MK-3, which features 16-bit S-boxes. Firstly, we achieve breakthroughs in finite field arithmetic. The arrangement method of Toffoli gates in the subfield F24 F 2 4 enables two types of optimized F28 F 2 8 multiplication circuits to reduce DW-cost by at least 50%. For F28 F 2 8 inversion, by proposing a new intermediate state uncomputing technique, the DW-cost of the inversion circuit is reduced by at least 40% compared with existing solutions. This can also be used to optimize the quantum circuits of block ciphers such as AES and SM4. Secondly, we propose three types of quantum circuits for MK-3’s 16-bit S-box. The basic circuit reduces multiplicative bit operations to 115, representing at least 20% reduction. We propose a more compact S-box structure, reducing the number of circuit qubits for two types of S-boxes from 52 to 40. Finally, we implement full-algorithm quantum attacks and conduct security evaluations for MK-3. Complete quantum circuits supporting 128-bit and 256-bit keys are constructed, enabling Grover key search attacks. Security assessments confirm the 128-bit version meets NIST Security Category 1 (with reasonable inference of achieving Category 2), while the 256-bit version satisfies the highest Category 5 standards, demonstrating resistance against large-scale quantum computing attacks. This work achieves the first quantum circuit implementation for 16-bit S-boxes and provides critical evaluation benchmarks for post-quantum cryptography standardization.
An efficient quantum implementation of the advanced encryption standard (AES) is crucial for reducing the complexity of implementing an exhaustive key search through Grover’s algorithm. In this paper, we study how to construct resource-efficient quantum circuits for AES. We consider the product of T-gates depth and width (TDW) and the product of full depth and width (FDW) as optimization targets. We propose a generic method, called the controlled control qubit cascade (CCQC) technique, to construct quantum circuits for nonlinear components with reduced TDW and FDW. Using this, we construct a quantum circuit for the AES S-box. Compared with recent work presented at ASIACRYPT 2023, our S-box quantum circuit achieves reductions of 2.3% in TDW and 45.2% in FDW. Additionally, we propose a new key schedule strategy to reduce the full depth of the AES quantum circuit. Finally, the trade-offs between T-gates depth and width and the parallel numbers of S-box and TDW are analyzed.