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arXiv:2502.12252 · Physical Review Research

Blueprint for fault-tolerant quantum computation with topological qubit arrays

David Aasen, Morteza Aghaee, Zulfi Alam, Mariusz Andrzejczuk, Andrey Antipov, Mikhail Astafev, Lukas Avilovas, Amin Barzegar, Bela Bauer, Jonathan Becker, Juan M. Bello-Rivas, Umesh Bhaskar, Alex Bocharov, Srini Boddapati, David Bohn, Jouri D. S. Bommer, Parsa Bonderson, Jan Borovsky, Leo Bourdet, Samuel Boutin, Tom Brown, Gary Campbell, Lucas Casparis, Srivatsa Chakravarthi, Rui Chao, Benjamin J. Chapman, Sohail Chatoor, Anna Wulff Christensen, Patrick Codd, William Cole, Paul Cooper, Fabiano Corsetti, Ajuan Cui, Wim van Dam, Tareq El Dandachi, Sahar Daraeizadeh, Adrian Dumitrascu, Andreas Ekefjärd, Saeed Fallahi, Luca Galletti, Geoff Gardner, Raghu Gatta, Haris Gavranovic, Michael Goulding, Deshan Govender, Flavio Griggio, Ruben Grigoryan, Sebastian Grijalva, Sergei Gronin, Jan Gukelberger, Jeongwan Haah, Marzie Hamdast, Esben Bork Hansen, Matthew Hastings, Sebastian Heedt, Samantha Ho, Justin Hogaboam, Laurens Holgaard, Kevin Van Hoogdalem, Jinnapat Indrapiromkul, Henrik Ingerslev, Lovro Ivancevic, Sarah Jablonski, Thomas Jensen, Jaspreet Jhoja, Jeffrey Jones, Kostya Kalashnikov, Ray Kallaher, Rachpon Kalra, Farhad Karimi, Torsten Karzig, Seth Kimes, Vadym Kliuchnikov, Maren Elisabeth Kloster, Christina Knapp, Derek Knee, Jonne Koski, Pasi Kostamo, Jamie Kuesel, Brad Lackey, Tom Laeven, Jeffrey Lai, G. de Lange, Thorvald Larsen, Jason Lee, Kyunghoon Lee, Grant Leum, Kongyi Li, Tyler Lindemann, Marijn Lucas, Roman Lutchyn, Morten Hannibal Madsen, Nash Madulid, Michael J. Manfra, Signe Brynold Markussen, Esteban Martinez, Marco Mattila, Jake Mattinson, Robert McNeil, Antonio Rodolph Mei

Published Dec 10, 2025• 17 citations
arXivHTMLPDF

Abstract

We describe a concrete device roadmap toward a fault-tolerant quantum computing architecture based on noise-resilient, topologically protected Majorana-based qubits. Our roadmap encompasses four generations of devices: a single-qubit device that enables a measurement-based qubit benchmarking protocol; a two-qubit device that uses measurement-based braiding to perform single-qubit Clifford operations; an eight-qubit device that can be used to show an improvement of a two-qubit operation when performed on logical qubits rather than directly on physical qubits; and a topological qubit array supporting lattice surgery demonstrations on two logical qubits. Devices that enable this path require a superconductor-semiconductor heterostructure that supports a topological phase, quantum dots and coupling between those quantum dots that can create the appropriate loops for interferometric measurements, and a microwave readout system that can perform fast, low-error single-shot measurements. We describe the key design components of these qubit devices, along with the associated protocols for demonstrations of single-qubit benchmarking, Clifford gate execution, quantum error detection, and quantum error correction, which differ greatly from those in more conventional qubits. Finally, we comment on implications and advantages of this architecture for utility-scale quantum computation.

DOI
10.1103/qx36-4rv1

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We describe a concrete device roadmap toward a fault-tolerant quantum computing architecture based on noise-resilient, topologically protected Majorana-based qubits. Our roadmap encompasses four generations of devices: a single-qubit device that enables a measurement-based qubit benchmarking protocol; a two-qubit device that uses measurement-based braiding to perform single-qubit Clifford operations; an eight-qubit device that can be used to show an improvement of a two-qubit operation when performed on logical qubits rather than directly on physical qubits; and a topological qubit array supporting lattice surgery demonstrations on two logical qubits. Devices that enable this path require a superconductor-semiconductor heterostructure that supports a topological phase, quantum dots and coupling between those quantum dots that can create the appropriate loops for interferometric measurements, and a microwave readout system that can perform fast, low-error single-shot measurements. We describe the key design components of these qubit devices, along with the associated protocols for demonstrations of single-qubit benchmarking, Clifford gate execution, quantum error detection, and quantum error correction, which differ greatly from those in more conventional qubits. Finally, we comment on implications and advantages of this architecture for utility-scale quantum computation.
Topological quantum codes are intrinsically fault-tolerant to local noise, and underlie the theory of topological phases of matter. We explore geometry to enhance the performance of topological quantum codes by rotating the four dimensional self-correcting quantum memory, and present codes targeted to both near-term and utility-scale quantum computers. We identify a full set of logical Clifford operations and with it design a universal fault-tolerant quantum architecture. Our design achieves single-shot error correction, significant reductions in required qubits, and low-depth logical operations. In turn, our proposed architecture relaxes the requirements for achieving fault tolerance and offers an efficient path for realization in several near-term quantum hardware implementations. Our [[96,6,8]] 4D Hadamard lattice code has low weight-6 stabilizers and depth-8 syndrome extraction circuits, a high pseudo-threshold of ∼0.01\sim 0.01∼0.01, and a logical error rate of ∼10−6\sim 10^{-6}∼10−6 per logical qubit per round of error correction at 10−310^{-3}10−3 physical error rate under a standard circuit-level noise model. A Clifford-complete logical gate set is presented, including a constructive and efficient method for Clifford gate synthesis.
Surface codes represent a promising route towards universal fault-tolerant quantum computation, allowing for the protection of stored quantum states against many types of errors. This theoretical work shows that, in addition, a significantly enhanced versatility in quantum information processing is expected when qubits are encoded into the Majorana bound states in topological superconductor-semiconductor heterostructures. In view of recent experimental evidence for Majorana states in such heterostructures, a two-dimensional network of interacting Majorana states thus may feature key advantages towards the long-term goal of a functional quantum computer. The authors discuss how topologically protected logical qubits in this Majorana surface code architecture can be defined, initialized, manipulated, and read out. The physical ingredients needed to implement such operations are familiar from topologically trivial quantum devices. In particular, by employing quantum interference terms in conductance measurements, composite single-electron pumping protocols, and gate-tunable tunnel barriers, the full set of gates required for universal quantum computation can be implemented.
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Quantum information protected by the topology of the storage medium is expected to exhibit long coherence times. Another feature is topologically protected gates generated through braiding of Majorana bound states (MBSs). However, braiding requires structures with branched topological segments which have inherent difficulties in the semiconductor–superconductor heterostructures now believed to host MBSs. In this paper, we construct quantum bits taking advantage of the topological protection and non-local properties of MBSs in a network of parallel wires, but without relying on braiding for quantum gates. The elementary unit is made from three topological wires, two wires coupled by a trivial superconductor and the third acting as an interference arm. Coulomb blockade of the combined wires spawns a fractionalized spin, non-locally addressable by quantum dots used for single-qubit readout, initialization, and manipulation. We describe how the same tools allow for measurement-based implementation of the Clifford gates, in total making the architecture universal. Proof-of-principle demonstration of topologically protected qubits using existing techniques is therefore within reach.
Quantum computers are devices that can solve certain problems faster than ordinary, classical computers. The fundamental units of quantum information are qubits, superpositions of two states, a "zero" state and a "one" state. There are various approaches to construct such two-level systems, among others, using superconducting circuits, trapped ions or photons. A common feature of these physical systems is that their coherence times are relatively short compared to the length of useful computations. Superconducting qubits, for instance, are currently the most advanced solid-state qubits, but they decohere after around 100 microseconds, and any information stored in these qubits is lost. On the other hand, useful quantum computations may require quantum information to survive on time scales that are many orders of magnitude longer, as their runtimes can reach several hours or even days. Topological quantum computing is an approach to construct qubits that survive for the entire duration of such a long computation. Topological quantum computing comes in two flavors. The condensed matter approach is to build error-resilient qubits using exotic quasiparticles in topological materials, most prominently Majorana zero modes in topological superconductors. Even though no such qubit has been built to date, the hope is that their coherence times may be significantly longer than the coherence times of currently available solid-state qubits, but are still expected to be too short for large-scale quantum computing. The quantum information approach is to combine many error-prone qubits to build more robust logical qubits using topological error-correcting codes, e.g., surface codes. Even though the first approach is hardware-based and the second approach is software-based, they are deeply related. With Majorana-based qubits, the main logical operations are Majorana fermion parity measurements. By replacing Majorana-based qubits with surface-code patches and parity measurements with lattice-surgery operations, schemes for quantum computation with Majorana-based qubits or with surface codes can be identical. In this thesis, we explore how to construct a large-scale topological fault-tolerant quantum computer that can perform useful quantum computations. Here, topological refers to the nature of the quantum error-correcting code, while the underlying hardware may be based on non-topological qubits, but could also be composed of Majorana-based qubits. We provide a complete picture of such a large-scale device, breaking down large quantum computations into logical qubits and logical operations, describing how these logical operations are performed on the level of physical qubits and physical gates, and finally discussing how these physical qubits can be pieced together in a Majorana-based system using topological superconducting nanowires.
This paper proposes a novel architecture for quantum computing based on topological crystalline transistors protected by topological principles. The core concept leverages non-Abelian anyons to implement a topological quantum error correction code, offering a pathway to robust quantum computation resistant to local disturbances. We detail the theoretical framework, focusing on the design principles and mathematical formalism underlying this approach. The architecture utilizes specially engineered topological crystals to confine and manipulate anyons, enabling reliable quantum operations. We present a rigorous analysis of the error correction mechanisms, demonstrating the potential for significantly improved fault tolerance compared to conventional qubit designs. Key aspects include the encoding scheme using braiding operations of anyons, the topological redundancy for error detection and correction, and the resulting improved qubit fidelity. The proposed design represents a significant step towards practical, scalable quantum computers capable of enduring the inherent challenges of quantum decoherence. The presented model highlights the crucial role of topological protection in realizing a stable and reliable quantum computing platform. Our focus is on the theoretical development and the underlying mathematical structure of this approach, laying the groundwork for future experimental investigations.