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arXiv:2412.15022 · New Journal of Physics

Quantum SWAP gate realized with CZ and iSWAP gates in a superconducting architecture

Christian Križan, Janka Biznárová, Liangyu Chen, Emil Hogedal, Amr Osman, Christopher Warren, Sandoko Kosen, Hang-Xi Li, Tahereh Abad, Anuj Aggarwal, Marco Caputo, Jorge Fernández-Pendás, Akshay Gaikwad, Leif Grönberg, Andreas Nylander, Robert Rehammar, Marcus Rommel, O. I. Yuzephovich, Anton Frisk Kockum, Joonas Govenius, Giovanna Tancredi, Jonas Bylander

Published Jul 1, 2025• 10 citations
arXivHTMLPDF

Abstract

Abstract It is advantageous for any quantum processor to support different classes of two-qubit quantum logic gates when compiling quantum circuits, a property that is typically not present in existing platforms. In particular, access to a gate set that includes support for the CZ-, iSWAP-, and SWAP-type families of gates renders conversions between these gate families unnecessary during compilation, as any two-qubit Clifford gate can be executed using at most one two-qubit gate from this set, plus additional single-qubit gates. We experimentally demonstrate that a SWAP gate can be decomposed into one iSWAP gate followed by one CZ gate, affirming a more efficient compilation strategy over the conventional approach that relies on three iSWAP or three CZ gates to replace a SWAP gate. Our implementation makes use of a superconducting quantum processor design based on fixed-frequency transmon qubits coupled together by a parametrically modulated tunable transmon coupler, extending this platform’s native gate set so that any two-qubit Clifford unitary matrix can be realized using no more than two two-qubit gates and single-qubit gates.

DOI
10.1088/1367-2630/adeba7

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Abstract It is advantageous for any quantum processor to support different classes of two-qubit quantum logic gates when compiling quantum circuits, a property that is typically not present in existing platforms. In particular, access to a gate set that includes support for the CZ-, iSWAP-, and SWAP-type families of gates renders conversions between these gate families unnecessary during compilation, as any two-qubit Clifford gate can be executed using at most one two-qubit gate from this set, plus additional single-qubit gates. We experimentally demonstrate that a SWAP gate can be decomposed into one iSWAP gate followed by one CZ gate, affirming a more efficient compilation strategy over the conventional approach that relies on three iSWAP or three CZ gates to replace a SWAP gate. Our implementation makes use of a superconducting quantum processor design based on fixed-frequency transmon qubits coupled together by a parametrically modulated tunable transmon coupler, extending this platform’s native gate set so that any two-qubit Clifford unitary matrix can be realized using no more than two two-qubit gates and single-qubit gates.
The possibility to utilize different types of two-qubit gates on a single quantum computing platform adds flexibility in the decomposition of quantum algorithms.A larger hardware-native gate set may decrease the number of required gates, provided that all gates are realized with high fidelity.Here, we benchmark both controlled-Z (CZ) and exchange-type (iSWAP) gates using a parametrically driven tunable coupler that mediates the interaction between two superconducting qubits.Using randomized benchmarking protocols we estimate an error per gate of 0.9 ± 0.03 and 1.3 ± 0.4% for the CZ and the iSWAP gate, respectively.We argue that spurious ZZ-type couplings are the dominant error source for the iSWAP gate, and that phase stability of all microwave drives is of utmost importance.Such differences in the achievable fidelities for different two-qubit gates have to be taken into account when mapping quantum algorithms to real hardware.
Recently, significant progress has been made in the demonstration of single-qutrit and coupled-qutrit gates with superconducting circuits. Coupled-qutrit gates have significantly lower fidelity than single-qutrit gates, owing to long implementation times. We present a protocol to implement the CZ universal gate for two qutrits based on a decomposition involving two partial-state swaps and local operations. The partial-state swaps can be implemented effectively using parametric coupling, which is fast and has the advantage of frequency selectivity. We perform a detailed analysis of this protocol in a system consisting of two fixed-frequency transmons coupled by a flux-tunable transmon. The application of an AC flux in the tunable transmon controls the parametric gates. This protocol has the potential to lead to fast and scalable two-qutrit gates in superconducting circuit architectures.
Quantum computation and quantum simulation require a versatile gate set to optimize circuit compilation for practical applications. However, existing platforms are often limited to specific gate types or rely on parametric couplers to extend their gate set, which compromises scalability. Here, we propose a scalable quantum simulator with an extended gate set based on giant-atom three-level systems, which can be implemented with superconducting circuits. Unlike conventional small atoms, giant atoms couple to the environment at multiple points, introducing interference effects that allow exceptional tunability of their interactions. By leveraging this tunability, our setup supports both CZ and iSWAP gates through simple frequency adjustments, eliminating the need for parametric couplers. This dual-gate capability enhances circuit efficiency, reducing the overhead for quantum simulation. As a demonstration, we showcase the simulation of spin dynamics in dissipative Heisenberg XXZ spin chains, highlighting the setup's ability to tackle complex open quantum many-body dynamics. Finally, we discuss how a two-dimensional extension of our system could enable fault-tolerant quantum computation, paving the way for a universal quantum processor.
High-performance two-qubit gates have been reported with superconducting qubits coupled via a single-transmon coupler (STC). Most of them are implemented for qubits with a small detuning since reducing residual ZZ coupling for highly detuned qubits by an STC is challenging. In terms of the frequency crowding and crosstalk, however, highly detuned qubits are desirable. Here, we numerically demonstrate a high-performance parametric gate for highly detuned fixed-frequency qubits using a recently proposed tunable coupler called a double-transmon coupler (DTC). Applying an ac flux pulse, we can perform a maximally entangling universal gate (iSWAP) with an average fidelity over 99.99% and a short gate time of about 24 ns. This speed is comparable to resonance-based gates for slightly detuned tunable qubits. Moreover, using a dc flux pulse alternatively, we can achieve another kind of entangling gate called a CZ gate with an average fidelity over 99.99% and a gate time of about 18 ns. Given the flexibility and feasible settings, we can expect that the DTC will contribute towards realizing a high-performance quantum computer in the near future.
Superconducting quantum processors could significantly profit from enhanced connectivity together with precise control of interactions and gates between qubits. Here we investigate plaquettes of four qubits that are coupled via a central tunable coupling circuit, so that not only gates between qubits connected by an edge of the plaquette can be executed but also between qubits across the diagonal. By numerically and analytically analyzing parametrically driven processes, we explore iSWAP\sqrt{\text{iSWAP}}iSWAP​-gates between any pair of qubits, also across the diagonal, as well as three-qubit interactions and gates. For experimentally available circuit parameters, we for example find iSWAP\sqrt{\text{iSWAP}}iSWAP​-gates with a gate time of 50 ns and 99.9\% fidelity, which is decreased to 99.4\% if two such gates are executed in parallel on disjoint qubit pairs in the plaquette. For three-qubit gates we find fidelities of 95\% fidelity at a gate time of 200 ns.
Future quantum information processors require tunable coupling architectures that can produce high-fidelity logical gates between two or more qubits. Parametric coupling is a powerful technique for generating tunable interactions between many qubits. Here, we present a highly flexible parametric coupling scheme with superconducting qubits that provides complete removal of residual Z Z coupling and the implementation of driven SWAP or SWAP-free controlled- Z ( C Z ) gates. Our fully integrated two-dimensional on-chip coupler design is only weakly flux tunable, cancels static linear coupling between the qubits, avoids internal coupler dynamics or excitations, and is extensible to multiqubit circuit-QED systems. Exploring gate fidelity versus gate duration allows us to maximize two-qubit gate fidelity, while providing insights into possible error sources for these gates. Randomized benchmarking over several hours reveals that the parametric SWAP C Z gate achieves an average fidelity of 99.44 ± 0.09 % in a gate duration of 70 ns and that a dispersively driven parametric SWAP-free C Z gate attains an average fidelity of 99.47 ± 0.07 % in only 30 ns. The fidelity remained above this value for over 8 h and peaked twice with a maximum of 99.67 ± 0.14 % . Overall, our parametric approach combines versatility, precision, speed, and high performance in one compact coupler design.