As quantum computing advances towards practical applications, reducing errors remains a crucial frontier for developing near-term devices. Errors in the quantum gates and quantum state readout could result in noisy circuits, which would prevent the acquisition of the exact expectation values of the observables. Although ultimate robustness to errors is known to be achievable by quantum error correction-based fault-tolerant quantum computing, its successful implementation demands large-scale quantum processors with low average error rates that are not yet widely available. In contrast, quantum error mitigation (QEM) offers more immediate and practical techniques, which do not require extensive resources and can be readily applied to existing quantum devices to improve the accuracy of the expectation values. Here, we report the implementation of a zero-noise extrapolation-based error mitigation technique on a silicon spin qubit platform. This technique has recently been successfully demonstrated for other platforms such as superconducting qubits, trapped-ion qubits, and photonic processors. We first explore three methods for amplifying noise on a silicon spin qubit: global folding, local folding, and pulse stretching, using a standard randomized benchmarking protocol. We then apply global folding-based zero-noise extrapolation to the state tomography and achieve a state fidelity of 99.96% (98.52%), compared to the unmitigated fidelity of 75.82% (82.16%) for different preparation states. The results show that the zero-noise extrapolation technique is a versatile approach that is generally adaptable to quantum computing platforms with different noise characteristics through appropriate noise amplification methods.
As quantum computing advances towards practical applications, reducing errors remains a crucial frontier for developing near-term devices. Errors in the quantum gates and quantum state readout could result in noisy circuits, which would prevent the acquisition of the exact expectation values of the observables. Although ultimate robustness to errors is known to be achievable by quantum error correction-based fault-tolerant quantum computing, its successful implementation demands large-scale quantum processors with low average error rates that are not yet widely available. In contrast, quantum error mitigation (QEM) offers more immediate and practical techniques, which do not require extensive resources and can be readily applied to existing quantum devices to improve the accuracy of the expectation values. Here, we report the implementation of a zero-noise extrapolation-based error mitigation technique on a silicon spin qubit platform. This technique has recently been successfully demonstrated for other platforms such as superconducting qubits, trapped-ion qubits, and photonic processors. We first explore three methods for amplifying noise on a silicon spin qubit: global folding, local folding, and pulse stretching, using a standard randomized benchmarking protocol. We then apply global folding-based zero-noise extrapolation to the state tomography and achieve a state fidelity of 99.96% (98.52%), compared to the unmitigated fidelity of 75.82% (82.16%) for different preparation states. The results show that the zero-noise extrapolation technique is a versatile approach that is generally adaptable to quantum computing platforms with different noise characteristics through appropriate noise amplification methods.
Recent hundred-qubit processors represent a significant hardware advancement, but current limitations prevent effective quantum error correction (QEC), necessitating reliance on quantum error mitigation (QEM) to enhance result fidelity from quantum computers. Our paper introduces a noise-aware folding technique that enhances Zero-Noise Extrapolation (ZNE) by leveraging the noise characteristics of target quantum hardware to fold circuits more efficiently. Unlike traditional ZNE approaches assuming uniform error distribution, our method redistributes noise using calibration data based on hardware noise models. By employing a noise-adaptive compilation method combined with our proposed folding mechanism, we enhance the ZNE accuracy of quantum gate-based computing using superconducting quantum computers. This paper highlights the uniqueness of our method, summarizes noise accumulation, presents the scaling algorithm, and compares the reliability of our method with those of existing models using linear extrapolation model. Experimental results show that compared to existing folding methods, our approach achieved up to a 23.6% improvement on quantum computer simulators and up to a 44.8% improvement on real quantum computers, with statistical confidence intervals indicating stable performance gains across circuit scales.
Near term quantum processors operate in a noise dominated regime, motivating error mitigation techniques that recover accurate expectation values without full fault tolerance. Zero Noise Extrapolation (ZNE) is a widely used but biased error mitigation method that lacks rigorous error bounds. Its effective application requires nontrivial technical choices, most notably the selection of noise scaling factors and extrapolation models, making ZNE sensitive to user expertise and often necessitating costly trial and error procedures. Here, we introduce Folding Free Zero Noise Extrapolation (FF-ZNE), a method that removes the need for noise factor selection by achieving effective noise amplification without circuit folding. FF-ZNE exploits isomorphic hardware layouts with distinct native noise profiles, such that executing a fixed circuit across these layouts induces controllable variations in the effective noise strength. Under a depolarizing noise model, we analytically show that the resulting extrapolation admits a fixed linear form, eliminating extrapolator choice and enabling a seamless, user independent mitigation procedure. We further propose two algorithms that identify sets of isomorphic hardware layouts on which a given circuit yields sufficiently distinct expectation values to enable reliable zero noise extrapolation. Experiments on a 133 qubit IBM Quantum device demonstrate that FF-ZNE yields mitigated expectation values with average deviations of ~6% and 4.5% for up to 50 qubit EfficientSU2 (sparse) and Hamiltonian simulation (dense) circuits, respectively. The method is thus scalable and applicable to a broad range of circuits. By eliminating noise factor and extrapolator selection, FF-ZNE transforms zero noise extrapolation from a technique requiring expert tuning into a practical, scalable, and broadly accessible error mitigation method for current quantum hardware.
A long-standing challenge in quantum computing is developing technologies to overcome the inevitable noise in qubits. To enable meaningful applications in the early stages of fault-tolerant quantum computing, devising methods to suppress post-correction logical failures is becoming increasingly crucial. In this work, we propose and experimentally demonstrate the application of zero-noise extrapolation, a practical quantum error mitigation technique, to error correction circuits on superconducting processors. By amplifying the noise on physical qubits, the circuits yield outcomes that exhibit a predictable dependence on noise strength, following a polynomial function determined by the code distance. This property enables the effective application of polynomial extrapolation to mitigate logical errors. Our experiments demonstrate a universal reduction in logical errors across various quantum circuits, including fault-tolerant circuits of repetition and surface codes. We observe a favorable performance in multi-round error correction circuits, indicating that this method remains effective when the circuit depth increases. These results advance the frontier of quantum error suppression technologies, opening a practical way to achieve reliable quantum computing in the early fault-tolerant era. Quantum error mitigation refers to techniques that reduce, rather than correct, errors in quantum computing. Here the authors demonstrate zero-noise extrapolation applied to quantum error correction circuits on superconducting processors, effectively reducing logical errors and advancing early fault-tolerant quantum computing.
Abstract Quantum error mitigation is a key enabling technique for extracting reliable computational results from noisy intermediate-scale quantum devices. Among existing approaches, zero-noise extrapolation (ZNE) is widely employed, but its effectiveness deteriorates in high-noise regimes or deep circuits, where measurement outcomes converge to the random-guessing limit. To address this issue, we propose a lightweight, extrapolation-based error mitigation framework that leverages the intrinsic repetitive structure of quantum algorithms. We classify these algorithms into homogeneous and heterogeneous types and efficiently estimate block fidelities using shallow identity sequences of the core operational block, thereby avoiding global circuit folding. Experiments on IBM’s advanced superconducting platform and its corresponding simulator demonstrate that the proposed framework remains effective even in high-noise regimes where folding-based ZNE(f-ZNE) fails due to noise saturation. For a four-qubit Grover search, our approach restores the success probability to near its theoretical value, whereas f-ZNE yields negligible improvement. We further validate the proposed method on a 17-qubit quantum approximate optimization algorithm with layer-dependent parameters, demonstrating robustness beyond fixed-structure circuits. These results indicate that leveraging algorithmic structure provides a practical pathway to extending the performance of extrapolation-based error mitigation on current quantum processors.
Increasing the utility of currently available Noisy Intermediate-Scale Quantum (NISQ) devices requires developing efficient methods to mitigate hardware errors. In this work we propose a novel Cyclic Layout Permutations-based Zero-Noise Extrapolation (CLP-ZNE) protocol for such a task. The method leverages the inherent non-uniformity of gate errors in NISQ hardware to extrapolate the expectation value, averaged over cyclic circuit layout permutations, to the level of zero noise. In contrast to the previous layout permutation based approaches, for an n-qubit circuit CLP-ZNE requires execution of only O(n) and at most O(n2) different circuit layouts for circuits of one-dimensional and arbitrary connectivity, respectively. When benchmarked against noise channels modeling the IBM Torino quantum computer, the method reduces a typical error in expectation values of n=12 qubit circuits by an order of magnitude, outperforming standard unitary folding ZNE. By demonstrating the ability to mitigate noise of real hardware specifications, including both depolarizing and T1/T2 relaxation processes, these results give evidence for the applicability of CLP-ZNE to present-day NISQ processors.
Quantum volume is a full-stack benchmark for near-term quantum computers. It quantifies the largest size of a square circuit which can be executed on the target device with reasonable fidelity. Error mitigation is a set of techniques intended to remove the effects of noise present in the computation of noisy quantum computers when computing an expectation value of interest. Effective quantum volume is a proposed metric that applies error mitigation to the quantum volume protocol to evaluate the effectiveness not only of the target device but also of the error mitigation algorithm. Digital zero-noise extrapolation is an error mitigation technique that estimates the noiseless expectation value using circuit folding to amplify errors by known scale factors and then extrapolating computed expectation values to the zero-noise limit. Here we demonstrate that zero-noise extrapolation, with global and local unitary folding with fractional scale factors, in conjunction with dynamical decoupling, can increase the effective quantum volume over the vendor-measured quantum volume. Specifically, we measure the effective quantum volume of four IBM Quantum superconducting processor units, obtaining values that are larger than the vendor-measured quantum volume on each device. This is the first such increase reported.