Quantum computing hardware is affected by quantum noise that undermine the quality of results of an executed quantum program. Amongst other quantum noises, coherent error that caused by parameter drifting and miscalibration, remains critical. While coherent error mitigation has been studied before, studies focused either on gate-level or pulse-level -- missing cross-level optimization opportunities; And most of them only target single-qubit gates -- while multi-qubit gates are also used in practice. To address above limitations, this work proposes a cross-layer approach for coherent error mitigation that considers program-level, gate-level, and pulse-level compiler optimizations, by leveraging the hidden inverse theory, and exploiting the structure inside different quantum programs, while also considering multi-qubit gates. We implemented our approach as compiler optimization passes, and integrated into IBM Qiskit framework. We tested our technique on real quantum computer (IBM-Brisbane), and demonstrated up to 92% fidelity improvements (45% on average), on several benchmarks.
Quantum computing hardware is affected by quantum noise that undermine the quality of results of an executed quantum program. Amongst other quantum noises, coherent error that caused by parameter drifting and miscalibration, remains critical. While coherent error mitigation has been studied before, studies focused either on gate-level or pulse-level -- missing cross-level optimization opportunities; And most of them only target single-qubit gates -- while multi-qubit gates are also used in practice. To address above limitations, this work proposes a cross-layer approach for coherent error mitigation that considers program-level, gate-level, and pulse-level compiler optimizations, by leveraging the hidden inverse theory, and exploiting the structure inside different quantum programs, while also considering multi-qubit gates. We implemented our approach as compiler optimization passes, and integrated into IBM Qiskit framework. We tested our technique on real quantum computer (IBM-Brisbane), and demonstrated up to 92% fidelity improvements (45% on average), on several benchmarks.
The rapid evolution of Noisy Intermediate-Scale Quantum (NISQ) devices has intensified the need for robust compilation strategies capable of mitigating hardware-induced errors while maximizing computational efficiency. Quantum compilers play a pivotal role in translating high-level quantum algorithms into hardware-executable instructions, yet they face significant challenges related to qubit connectivity constraints, limited coherence times, and stochastic noise. This paper examines error-resilient quantum compiler design for efficient qubit mapping, gate optimization, and noise mitigation in NISQ-era devices, proposing a framework that integrates topology-aware mapping, adaptive gate synthesis, and probabilistic error suppression techniques. By synthesizing advances in quantum circuit optimization, hardware-aware scheduling, and hybrid classical–quantum error correction strategies, the study evaluates how compiler-level innovations can substantially enhance execution fidelity and resource efficiency. The findings suggest that intelligent compiler architectures are critical enablers of practical quantum advantage during the transitional NISQ phase, bridging theoretical algorithm design with real-world hardware constraints.
Quantum computing holds transformative potential, but its adoption is hindered by the complexity of generating efficient, hardware-specific code. This work presents a modular, extensible compiler framework that bridges high-level quantum languages with diverse hardware architectures. The framework consists of three modules: a front-end for parsing quantum code into a hardware-agnostic intermediate representation (IR), an optimization module for enhancing quantum circuits through gate synthesis, qubit routing, and error mitigation, and a back-end for generating hardware-specific instructions. Major contributions include a hardware-agnostic IR for cross-platform compatibility, optimization techniques to reduce gate complexity and noise, and hardware-specific adaptations to improve execution fidelity. A practical demonstration optimizes quantum circuits, highlighting the impact of hardware constraints. Comparative analysis of IBM Quantum and IonQ platforms underscores the role of qubit connectivity and noise resilience in algorithmic performance. This scalable framework enhances quantum software development and efficient hardware utilization.
We present an analysis of quantum circuit fidelity across the full compilation stack, from high-level gate optimization through pulse-level control. We connect a C++ circuit optimizer to a per-gate Lindblad master-equation fidelity model whose decoherence channels are cross-validated against qiskit-dynamics and whose absolute predictions are benchmarked against execution on real hardware. Across a campaign of 4,452 experiment runs over 371 benchmark circuits, gate cancellation provides the dominant improvement (d=1.66, 72% of circuits improved), while circuit size and pulse duration are the strongest negative predictors of process fidelity (input gates r=−0.78; pulse duration r=−0.73, R2=0.53). A formal ablation study shows that pass ordering has no significant effect on two-qubit gate reduction (Kruskal--Wallis p=0.302). Comparing against Qiskit transpilation levels, we show that two-qubit gate count, not total gate count, is the hardware-relevant metric: our optimizer attains superior two-qubit reduction on structured circuits (87.8% on QFT, 100% on QAOA) whereas Qiskit's larger total-gate reduction is dominated by single-qubit (u3) consolidation. Finally, executing eight circuits on the IQM Resonance Garnet processor (8/8 jobs completed, job identifiers released) reveals that the model is a consistent upper bound: it preserves the relative difficulty ordering of circuits but overestimates absolute fidelity by a mean of 0.49, quantifying the error budget (crosstalk, leakage, readout) outside a T1/T2/depolarizing model. We release the framework, data, and scripts as open source.
The recent times of fast development of quantum computers has been followed by many researchers who want to run the larger and more difficult quantum algorithms on it and they have promised such speedup several times. Notwithstanding this, commercial quantum computers are currently fraught with instability and errors. This paper is centered on development of the customized compiler for quantum computing with aid of Qiskit Terra, a QIS framework. We target central classes such as circuit representation structures, programming techniques based on OpenQASM, challenges in the QC architecture, high-level routing optimization, and the structure of the Qiskit Terra compiler. In every circuit, the optimization is provided by methods of Qiskit Terra, including Trivial Layout, Noise Adaptive Layout, Dense Layout, and Custom Layout. These optimization levels address many problems that emerge when circuits are being compiled and executed, and thus, the optimization levels seek to boost circuit efficiency, reduce the count of gates, and enhance the overall performance. The introduction of numerous optimization passes starting from unroller passes that translate gates, the layout passes that map virtual to physical qubits, and the optimization algorithm aimed at the runtime reduction. Modern quantum compilation technologies are being currently developed based on economic (and theoretical) analyses to underpin the investigation and development of optimal quantum computation procedures.
While quantum computing holds great potential in combinatorial optimization, electronic structure calculation, and number theory, the current era of quantum computing is limited by noisy hardware. Many quantum compilation approaches can mitigate the effects of imperfect hardware by optimizing quantum circuits for objectives such as critical path length. Few approaches consider quantum circuits in terms of the set of vendor-calibrated operations (i.e., native gates) available on target hardware. This manuscript expands the analytical and numerical approaches for optimizing quantum circuits at this abstraction level. We present a procedure for combining the strengths of analytical native gate-level optimization with numerical optimization. Although we focus on optimizing Toffoli gates on the IBMQ native gate set, the methods presented are generalizable to any gate and superconducting qubit architecture. Our optimized Toffoli gate implementation demonstrates an 18% reduction in infidelity compared with the canonical implementation as benchmarked on IBM Jakarta with quantum process tomography. Assuming the inclusion of multi-qubit cross-resonance (MCR) gates in the IBMQ native gate set, we produce Toffoli implementations with only six multi-qubit gates, a 25% reduction from the canonical eight multi-qubit implementations for linearly connected qubits.
Quantum programming languages and their compilers form the critical software layer between abstract quantum algorithm specifications and physical hardware execution -- yet compiler quality varies enormously across the quantum software ecosystem, with suboptimal compilation directly increasing circuit depth, gate count, and consequently error rates on NISQ hardware. This paper proposes the Quantum Compiler Design and Evaluation (QCDE) framework, a systematic methodology for quantum compiler optimisation across four compilation stages: gate synthesis (decomposing abstract gates to hardware-native gate sets), routing (mapping virtual qubits to physical qubits under connectivity constraints), scheduling (ordering gates to minimise decoherence), and cross-layer optimisation (combining all stages with error mitigation awareness). QCDE evaluates six quantum compilers (Qiskit transpiler L1-L3, TKET, BQSKit, Cirq, Quilc, and a novel QCDE-Opt compiler) on 48 benchmark circuits from the QOAS, HQCAD, and QNNDE algorithm ecosystems. QCDE-Opt achieves 18.4% lower CX gate count vs. Qiskit L3 (best existing compiler) through a novel error-aware peephole optimisation pass. BQSKit provides the best synthesis quality at 28.4% CX reduction but 12.4x compilation overhead. TKET achieves the best balance of quality and speed (8.4% CX reduction, 1.8x overhead). QCDE provides a compiler selection guide and the QCDE-Opt compiler as an open-source contribution.