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arXiv:2410.03009

Implementing Josephson Junction spectroscopy in a scanning tunneling microscope

Margaret Fortman, Harrison, David C., Ramiro H. Rodriguez, Zachary J. Krebs, Sang‐Jun Han, Min Seok Jang, R. McDermott, Çağlar Girit, Victor W. Brar

Published Oct 3, 2024• 0 citations
arXivHTMLPDF

Abstract

Josephson junction spectroscopy is a powerful local microwave spectroscopy technique that has promising potential as a diagnostic tool to probe the microscopic origins of noise in superconducting qubits. We present advancements toward realizing Josephson junction spectroscopy in a scanning geometry, where the Josephson junction is formed between a superconducting sample and a high capacitance superconducting STM tip. Data from planar Nb-based Josephson junction devices first demonstrate the benefits of including a high capacitance shunt across the junction, which decreases linewidth and improves performance at elevated temperatures. We show how an equivalent circuit can be implemented by utilizing a planarized STM tip with local prominences, which are fabricated via electron beam lithography and reactive ion etching, followed by coating with a superconducting layer. Differential conductance measurements on a superconducting NbN surface demonstrate the ability of these high capacitance tips to decrease both thermal noise and P(E)-broadening in comparison to typical wire tips.

DOI
10.48550/arxiv.2410.03009

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Microscopy and Microanalysis•Jul 1, 2024•0 citations
Josephson junction spectroscopy is a powerful local microwave spectroscopy technique that has promising potential as a diagnostic tool to probe the microscopic origins of noise in superconducting qubits. We present advancements toward realizing Josephson junction spectroscopy in a scanning geometry, where the Josephson junction is formed between a superconducting sample and a high capacitance superconducting STM tip. Data from planar Nb-based Josephson junction devices first demonstrate the benefits of including a high capacitance shunt across the junction, which decreases linewidth and improves performance at elevated temperatures. We show how an equivalent circuit can be implemented by utilizing a planarized STM tip with local prominences, which are fabricated via electron beam lithography and reactive ion etching, followed by coating with a superconducting layer. Differential conductance measurements on a superconducting NbN surface demonstrate the ability of these high capacitance tips to decrease both thermal noise and P(E)-broadening in comparison to typical wire tips.
The field of quantum computing is growing at a rapid rate with the promise of dramatic improvements in the ability to solve critical computational problems. A leading approach for implementing fault-tolerant quantum computers is based on superconducting circuits containing Josephson junctions to form qubits. These qubits have many attractive qualities, but predicting the device performance requires detailed knowledge of the junction properties. Thus, precise characterization is crucial for realizing different qubit designs. The coherence of superconducting qubits is limited by several sources in the circuit en- vironment. Building a quantum computer requires effort to reduce gate errors caused by decoherence. This is typically achieved with quantum error correction. An alternative ap- proach involves designing qubits that are intrinsically protected from noise sources. One such design is the charge-parity qubit, which combines Josephson junctions in a novel regime. The capacitance of the junctions is a critical parameter for this qubit design that directly affects the engineered protection against decoherence. Beyond the conventional geometric capaci- tance, there is an excess contribution from virtual quasiparticle tunneling; we refer to this component as the electronic capacitance. This thesis focuses on the characterization of the capacitance of Josephson junctions, with the goal of isolating and measuring the electronic capacitance contribution, particularly for use in the charge-parity qubit. The thesis first reviews the initial implementation of the charge-parity qubit and the challenges that were encountered. Next, the theoretical origin is described and a framework for measuring the junction capacitance using superconducting resonant circuits is described. This technique is then applied to arrays of junctions fabricated with different parameters and the scaling of the electronic capacitance is presented. Finally, based on this knowledge of the junction capacitance, second-generation charge-parity qubits are implemented and the experimental results are presented.
Advanced microwave technologies constitute the foundation of a wide range of modern sciences, including microwave integrated circuits, quantum computing, microwave photonics, spintronics, etc. To facilitate the design of chip-based microwave devices, there is an increasing demand for state-of-the-art microscopic techniques that are capable of characterizing near-field microwave distribution and performance. In this work, we integrate Josephson junctions onto a nanosized quartz tip, forming a highly sensitive microwave mixer on-tip. This allows us to conduct spectroscopic imaging of near-field microwave distributions with high spatial resolution. By leveraging its microwave-sensitive characteristics, our Josephson microscopy achieves a broad detecting bandwidth of ≤200 GHz, as well as remarkable frequency and intensity resolutions. Near-field characterizations of microwave circuits are also conducted to demonstrate the capabilities of Josephson microscopy. Our work emphasizes the benefits of utilizing Josephson microscopy as a real-time, non-destructive technique to advance integrated microwave devices.
Researches on the fabrication of ~ 0.1 × 0.1 μ m 2 superconductor–insulator–superconductor (SIS) Josephson junctions are reviewed. Today, a typical dimension is 1–10 μm for Josephson junctions in superconducting integrated circuits. These Josephson junctions are defined by well-established photolithographic technology with reactive ion etching (RIE), and for the superconductor, Nb is almost always used. The merits of Nb include the facts that the superconducting transition temperature Tc of Nb (9.2 K ) is higher than the boiling point of He (4.2 K ), and that Nb has excellent stability against thermal cycling between room temperature and liquid- He temperature. For the fabrication of ~ 0.1 × 0.1 μ m 2 junctions, on the other hand, there is a standard process with electron-beam lithography, shadow evaporation, and lift-off. This process works well for Al (Tc = 1.2 K ), however, it is not ideal for Nb . The scope of this brief review is the nanoscale junction with Nb electrodes. We will look at the efforts of optimizing the standard lift-off process for Nb , electron-beam-lithographic versions of the Nb Josephson-junction technology, focused-ion-beam (FIB) etching as a convenient alternative to electron-beam lithography and RIE, etc. In order to characterize nanoscale tunnel junctions, the single-charge transistor has been often fabricated. Therefore, a summary of its theoretical transport properties is also included.
To increase the integration scale of superconductor electronics, we are developing a new node, titled SFQ7ee, of the fabrication process at MIT Lincoln Laboratory. In comparison to the existing SFQ5ee node, we increased the number of fully planarized superconducting layers to ten and utilized NbN and NbN/Nb kinetic inductors to increase the possible inductor number density above a hundred million inductors per cm2. Increasing the Josephson junction number density to the same level requires implementing self-shunted high-JcJosephson junctions. We investigated the properties of Nb/NbNx/Nb trilayer junctions as a potential replacement of high-JcNb/Al-AlOx/Nb junctions, where NbNxis a disordered, overstoichiometric, nonsuperconducting nitride deposited by reactive sputtering. Dependences of theIcRnproduct and Josephson critical current density, Jc on the NbNx barrier thickness and temperature were studied in the thickness range from 5 nm to 20 nm. The fabricated junctions can be well described by the microscopic theory of SNS junctions, assuming no suppression of the energy gap in Nb electrodes near the NbNxinterfaces and a Cooper pair decay length in the NbNx barrier, ξnTcof about 2.3 nm. Current-voltage characteristics of the junctions are well described by the resistively and capacitively shunted junction (RCSJ) model without excess current. In the studied rangeJc2, the Nb/NbNx/Nb junctions have lower values of the specific resistanceRnA, lower IcRn products, and a stronger dependence of theIcRnon temperature than the self-shunted or critically damped externally shunted Nb/Al-AlOx/Nb junctions with the same critical current density; A is the junction area,Icthe junction critical current, and Rnthe effective shunting resistance.
Superconducting three-Josephson-junction flux qubits (3JFQB) are possible candidates for the basic elements of a (future) scalable quantum computer. An important design parameter is the capacitance of their Josephson junctions. We estimate the capacitance per junction area (specific capacitance) of junctions typically used in 3JFQBs, i.e., of Al/AlOx/Al junctions with 5–10 Å thick oxide layers. The capacitance is obtained by analyzing resonant voltage steps in the current–voltage characteristics of specifically designed dc superconducting quantum interference devices (SQUIDs). The junction area is deduced from scanning electron microscope images. We find that the specific capacitance of our junctions is Cs=100±25 fF/μm2. Finally we compare this result to capacitance estimates obtained with 3JFQB microwave spectroscopy and find that the SQUID resonance method provides a much higher accuracy.
The development of quantum computers, capable of surpassing classical computing in solving specific complex problems, hinges on breakthroughs in materials science, precision device fabrication, and the optimization of quantum architectures [1]. Among the leading candidates for quantum computation, superconducting qubits, particularly those based on transmon designs, have shown promising advances with coherence times reaching hundreds of microseconds [2]. However, to fully unlock the potential of scalable quantum computing, further enhancements in coherence are necessary. The intricate structure-coherence relationship within these devices, especially at critical interfaces such as metal-air, metal-dielectric, and metal-substrate in Josephson junctions (JJs), poses a significant challenge due to the potential for two-level-system loss channels. Here, we detail our pioneering efforts to understand these structure-coherence relationships utilizing advanced electron microscopy techniques. Focusing on the Al-AlOx and Al-Si substrate interfaces in Josephson Junctions, we employ a combination of low-loss and core-loss electron energy loss spectroscopy (EELS) and four-dimensional scanning transmission electron microscopy (4D-STEM) conducted at room and ultra-low temperatures (sub-6 K). This approach allows for an unprecedented examination of the chemical composition, bonding environments, and nanoscale structures of key surfaces and interfaces critical to the quantum coherence. Figure 1 presents a typical superconducting architecture at the chip level; each superconducting qubit consists of a Josephson Junction in parallel with an ultra-low-loss capacitor to create a resonant structure in the 3-6GHz range. JJs are highlighted in the area boxed in Fig. 1A and can be observed in detail in Fig. 1B. Lamella cross-sections (as shown in Fig. 1C) were prepared using a dual-beam focused ion beam (FIB) FEI-SEM Helios Nanolab. The lift-off was performed using 30 kV Ga+ ions, and the final cleaning step was carried out at 2 kV to remove surface damage on the area of interest, resulting in a final sample thickness of 50-100 nm. Transmission electron microscopy (TEM) and scanning transmission electron microscopy (STEM) data were collected on a probe-corrected JEOL ARM200 S/TEM operating at 200 kV. The convergent angle for ADF-STEM imaging was 25 mrad. Electron energy loss spectra (EELS) were acquired at 200 kV using a Gatan GIF Quantum on a K2 pixelated detector. Data processing (background subtraction, plural scattering removal, and signal mapping) was conducted using Gatan GMS software. Four-dimensional STEM (4D-STEM) data were collected by a K3 and STELA cameras. The convergent angles were 0.5-1.5 mrad, and the camera length was 6-10 cm. The step size was 5-10 Å. Merging microscopic insights with electrical data and theoretical frameworks, we aim to reveal how atomic-scale irregularities affect coherence times. Our results highlight key decoherence mechanisms in superconducting qubits and suggest specific improvements for qubit design and manufacturing. By linking electron microscopy findings to device performance, we outline strategies to reduce decoherence, essential for achieving reliable quantum computing. This work bridges materials science and quantum engineering, driving efforts in making scalable quantum computers forward [3]. A) Microscopic view of a superconducting transmon qubit, highlighting its symmetric design with central island and capacitor pads. B) SEM image of a JJ displaying their Al top and bottom contacts. C) STEM image of a JJ showing its key components and interfaces: Al top and bottom contact, AlOx tunnel barrier, Si substrate and Al-Si interface. A) EELS chemical maps of two interfaces, Al/Al and Al/Si using K-edges of oxygen, aluminum and silicon of a Josephson junction. It is possible to detect a formation of oxides at both interfaces. Plots showing Al and Si K-edge at 1560 eV and 1839 eV, respectively, and the ELNES are shown on the right side (Scale bar in A – 20 nm). B) Analysis of the disordered Al phases at the interfaces utilizing ePDF.