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arXiv:2409.03725

Hardware-Assisted Parameterized Circuit Execution

Abhi Rajagopala, Akel Hashim, Neelay Fruitwala, Gang Huang, Yilun Xu, Jordan Hines, Irfan A. Siddiqi, Katherine Klymko, Kasra Nowrouzi

Published Sep 5, 2024• 0 citations
arXivHTMLPDF

Abstract

Standard compilers for quantum circuits decompose arbitrary single-qubit gates into a sequence of physical X(pi/2) pulses and virtual-Z phase gates. Consequently, many circuit classes implement different logic operations but have an equivalent structure of physical pulses that only differ by changes in virtual phases. When many structurally-equivalent circuits need to be measured, generating sequences for each circuit is unnecessary and cumbersome, since compiling and loading sequences onto classical control hardware is a primary bottleneck in quantum circuit execution. In this work, we develop a hardware-assisted protocol for executing parameterized circuits on our FPGA-based control hardware, QubiC. This protocol relies on a hardware-software co-design technique in which software identifies structural equivalency in circuits and "peels" off the relevant parameterized angles to reduce the overall waveform compilation time. The hardware architecture then performs real-time "stitching" of the parameters in the circuit to measure circuits that implement a different overall logical operation. This work demonstrates significant speed ups in the total execution time for several different classes of quantum circuits.

DOI
10.48550/arxiv.2409.03725

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Standard compilers for quantum circuits decompose arbitrary single-qubit gates into a sequence of physical X(pi/2) pulses and virtual-Z phase gates. Consequently, many circuit classes implement different logic operations but have an equivalent structure of physical pulses that only differ by changes in virtual phases. When many structurally-equivalent circuits need to be measured, generating sequences for each circuit is unnecessary and cumbersome, since compiling and loading sequences onto classical control hardware is a primary bottleneck in quantum circuit execution. In this work, we develop a hardware-assisted protocol for executing parameterized circuits on our FPGA-based control hardware, QubiC. This protocol relies on a hardware-software co-design technique in which software identifies structural equivalency in circuits and "peels" off the relevant parameterized angles to reduce the overall waveform compilation time. The hardware architecture then performs real-time "stitching" of the parameters in the circuit to measure circuits that implement a different overall logical operation. This work demonstrates significant speed ups in the total execution time for several different classes of quantum circuits.
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Large-scale qubit systems represent the future of superconducting quantum computing. As the number of qubits and functions increases, the current qubit control architectures struggle to achieve large-scale expansion. To address this issue, we have developed a field-programmable gate array-based scheduling system, which serves as a control architecture deployed on measurement and control hardware. This system achieves the generation of multi-channel long sequence pulses using minimal storage space, with reusable envelope and instruction designs. The envelopes and instructions are preloaded into the electronics, with each instruction corresponding to a different segment of the output waveform. The architecture we designed allows for extended pulse control lengths and more complex experiments without the requirement for external storage resources. We present the resource utilization of the implementation and compare it with previous measurements under different qubit counts. To verify the functionality of the system, we conducted a series of performance tests and characterization experiments on the deployed electronics. The measured single-qubit relaxation time T1 is 34.1 μs, and the dephasing time T2* is 25.8 μs. We characterized the quality of the control pulses using a randomized benchmarking protocol, achieving an average fidelity of 99.962%.
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