Abstract Successfully implementing a quantum algorithm involves maintaining a low logical error rate by ensuring the validity of the quantum fault‐tolerance theorem. The required number of physical qubits arranged in an array depends on the chosen Quantum Error Correction code and the achievable physical qubit error rate. As the qubit count in the array increases, parallel gating —simultaneously manipulating many qubits— becomes a crucial ingredient for successful computation. In this study, small arrays of a type of donor‐ and quantum dot‐based qubits, known as flip‐flop (FF) qubits, are investigated. Simulation results of gate fidelities in linear, square and star arrays of four FF qubits affected by realistic 1/f noise are presented to study the effect of parallel gating. The impact of two, three and four parallel one‐qubit gates, as well as two parallel two‐qubit gates, on fidelity is calculated by comparing different array geometries. The findings can contribute to the optimized manipulation of small FF qubit arrays and the design of larger ones.
Abstract Successfully implementing a quantum algorithm involves maintaining a low logical error rate by ensuring the validity of the quantum fault‐tolerance theorem. The required number of physical qubits arranged in an array depends on the chosen Quantum Error Correction code and the achievable physical qubit error rate. As the qubit count in the array increases, parallel gating —simultaneously manipulating many qubits— becomes a crucial ingredient for successful computation. In this study, small arrays of a type of donor‐ and quantum dot‐based qubits, known as flip‐flop (FF) qubits, are investigated. Simulation results of gate fidelities in linear, square and star arrays of four FF qubits affected by realistic 1/f noise are presented to study the effect of parallel gating. The impact of two, three and four parallel one‐qubit gates, as well as two parallel two‐qubit gates, on fidelity is calculated by comparing different array geometries. The findings can contribute to the optimized manipulation of small FF qubit arrays and the design of larger ones.
Abstract The long coherence time of donor atom nuclear spin states and of its bounded electron in can be exploited to define a qubit. This work is focused on a type of donor‐ and quantum dot‐based qubit, the flip‐flop (FF) qubit, that leverages antiparallel electron‐nuclear spin states of a donor atom controlled by an electric field. It can provide long‐range inter‐qubit interactions in the order of some hundreds of nanometers, thus relaxing the common constraints and tolerances on inter‐qubit distances in donor‐based qubits. Simulation results of linear array (LA) and square array (SA) of four FF qubits are presented to study the effect of noise, idle qubits, and simultaneous gating (parallel gating) on gate fidelity. The impact of noise and qubit mutual coupling for both considered types of array are presented and the obtained fidelity results are compared.
Abstract Quantum computers based on silicon are promising candidates for long term universal quantum computation due to the long coherence times of electron and nuclear spin states. Furthermore, the continuous progress of micro‐ and nano‐electronics, also related to the scaling of metal–oxide–semiconductor systems, makes it possible to control the displacement of single dopants thus suggesting their exploitation as qubit holders. Flip‐flop qubit is a donor based qubit where interactions between qubits are achievable for distance up to several hundred nanometers. In this work, a linear array of flip‐flop qubits is considered and the unwanted mutual qubit interactions due to the simultaneous application of two one‐qubit and two two‐qubit gates are included in the quantum gate simulations. In particular, by studying the parallel execution of couples of one‐qubit gates, namely and , and of couples of two‐qubit gate, that is, , a safe inter‐qubit distance is found where unwanted qubit interactions are negligible thus leading to parallel gates fidelity up to 99.9%.
One of the largest obstacles to building a quantum computer is gate error, where the physical evolution of the state of a qubit or group of qubits during a gate operation does not match the intended unitary transformation. Gate error stems from a combination of control errors and random single qubit errors from interaction with the environment. While great strides have been made in mitigating control errors, intrinsic qubit error remains a serious problem that limits gate fidelity in modern qubit architectures. Simultaneously, recent developments of small error-corrected logical qubit devices promise significant increases in logical state lifetime, but translating those improvements into increases in gate fidelity is a complex challenge. In this Letter, we construct protocols for gates on and between small logical qubit devices which inherit the parent device's tolerance to single qubit errors which occur at any time before or during the gate. We consider two such devices, a passive implementation of the three-qubit bit flip code, and the author's own [E. Kapit, Phys. Rev. Lett. 116, 150501 (2016)PRLTAO0031-900710.1103/PhysRevLett.116.150501] very small logical qubit (VSLQ) design, and propose error-tolerant gate sets for both. The effective logical gate error rate in these models displays superlinear error reduction with linear increases in single qubit lifetime, proving that passive error correction is capable of increasing gate fidelity. Using a standard phenomenological noise model for superconducting qubits, we demonstrate a realistic, universal one- and two-qubit gate set for the VSLQ, with error rates an order of magnitude lower than those for same-duration operations on single qubits or pairs of qubits. These developments further suggest that incorporating small logical qubits into a measurement based code could substantially improve code performance.
Abstract Quantum computers are powerful tools for certain computational problems, but their fragile quantum states are easily disrupted by environmental noise, causing errors that degrade computational accuracy. Quantum error correction (QEC) addresses this challenge by encoding one logical qubit across multiple physical qubits, so that individual errors can be identified and reversed through redundancy. We used Qiskit Aer, a free open-source quantum circuit simulator, to test the repetition code, one of the simplest QEC methods, under three types of noise: bit-flip, phase-flip, and depolarizing. We compared an unprotected single-qubit baseline (n = 1) to 3-qubit (n = 3) and 5-qubit (n = 5) repetition codes, sweeping the physical error rate p from 0 to 0.15 with 4,000 simulation shots per data point. We hypothesized that larger codes would achieve higher logical success probabilities at all tested noise levels, with n = 5 outperforming n = 3, which would outperform the unprotected baseline. Our results confirmed this scaling trend across all three noise types. At p = 0.10 under bit-flip noise, the baseline achieved 0.713 logical success, while n = 3 reached 0.791 and n = 5 reached 0.843. At low noise (p = 0.02), the n = 5 code approached 0.994 logical success. Simulation results closely matched exact theoretical predictions derived from the binomial failure probability formula, validating our experimental implementation. These findings confirm that even the simplest QEC methods provide meaningful error reduction and that larger codes offer greater protection, demonstrating a foundational principle of quantum error correction using only free simulation tools.
Abstract Quantum computers are powerful tools for certain computational problems, but their fragile quantum states are easily disrupted by environmental noise, causing errors that degrade computational accuracy. Quantum error correction (QEC) addresses this challenge by encoding one logical qubit across multiple physical qubits, so that individual errors can be identified and reversed through redundancy. We used Qiskit Aer, a free open-source quantum circuit simulator, to test the repetition code, one of the simplest QEC methods, under three types of noise: bit-flip, phase-flip, and depolarizing. We compared an unprotected single-qubit baseline (n = 1) to 3-qubit (n = 3) and 5-qubit (n = 5) repetition codes, sweeping the physical error rate p from 0 to 0.15 with 4,000 simulation shots per data point. We hypothesized that larger codes would achieve higher logical success probabilities at all tested noise levels, with n = 5 outperforming n = 3, which would outperform the unprotected baseline. Our results confirmed this scaling trend across all three noise types. At p = 0.10 under bit-flip noise, the baseline achieved 0.713 logical success, while n = 3 reached 0.791 and n = 5 reached 0.843. At low noise (p = 0.02), the n = 5 code approached 0.994 logical success. Simulation results closely matched exact theoretical predictions derived from the binomial failure probability formula, validating our experimental implementation. These findings confirm that even the simplest QEC methods provide meaningful error reduction and that larger codes offer greater protection, demonstrating a foundational principle of quantum error correction using only free simulation tools.
Abstract Impurities hosted in semiconducting solid matrices represent an extensively studied platform for quantum computing applications. In this scenario, the so-called flip-flop qubit emerges as a convenient choice for scalable implementations in silicon. Flip-flop qubits are realized implanting phosphorous donor in isotopically purified silicon, and encoding the logical states in the donor nuclear spin and in its bound electron. Electrically modulating the hyperfine interaction by applying a vertical electric field causes an Electron Dipole Spin Resonance (EDSR) transition between the states with antiparallel spins {∣↓⇑⟩,∣↑⇓⟩} {|↓⇑〉,|↑⇓〉} , that are chosen as the logical states. When two qubits are considered, the dipole-dipole interaction is exploited to establish long-range coupling between them. A universal set of quantum gates for flip-flop qubits is here proposed and the effect of a realistic 1/f noise on the gate fidelity is investigated for the single qubit Rz(−2π) Rz(−π2) and Hadamard gate and for the two-qubit iSWAP iSWAP gate.