Abstract Quantum data centres (QDCs) could overcome the scalability challenges of modern quantum computers. Single-processor monolithic quantum computers are affected by increased cross talk and difficulty of implementing gates when the number of qubits is increased. In a QDC, multiple quantum processing units (QPUs) are linked together over short distances, allowing the total number of computational qubits to be increased without increasing the number of qubits on any one processor. In doing so, the error incurred by operations at each QPU can be kept small, however additional noise will be added to the system due to the latency cost and errors incurred during inter-QPU entanglement distribution. We investigate the relative impact of these different types of noise using a classically simulated QDC with two QPUs and compare the robustness to noise of the two main ways of implementing remote gates, cat-comm and TP-comm. We find that considering the quantity of gates or inter-QPU entangled links is often inadequate to predict the output fidelity from a quantum circuit and infer that an improved understanding of error propagation during distributed quantum circuits may represent a significant optimisation opportunity for compilation.
Abstract Quantum data centres (QDCs) could overcome the scalability challenges of modern quantum computers. Single-processor monolithic quantum computers are affected by increased cross talk and difficulty of implementing gates when the number of qubits is increased. In a QDC, multiple quantum processing units (QPUs) are linked together over short distances, allowing the total number of computational qubits to be increased without increasing the number of qubits on any one processor. In doing so, the error incurred by operations at each QPU can be kept small, however additional noise will be added to the system due to the latency cost and errors incurred during inter-QPU entanglement distribution. We investigate the relative impact of these different types of noise using a classically simulated QDC with two QPUs and compare the robustness to noise of the two main ways of implementing remote gates, cat-comm and TP-comm. We find that considering the quantity of gates or inter-QPU entangled links is often inadequate to predict the output fidelity from a quantum circuit and infer that an improved understanding of error propagation during distributed quantum circuits may represent a significant optimisation opportunity for compilation.
Distributed quantum computing is a promising way of overcoming the scalability challenges of quantum computers, but establishing quantum links over large distances remains difficult. Therefore, in this thesis, we explore quantum data centres (QDCs), in which multiple quantum processing units (QPUs) are housed together within the same warehouse and linked together over short links. By considering such a setting, we avoid the challenges of long-distance quantum communications while retaining the scalability of distributed architectures. We focus primarily on understanding and quantifying the role of noise in QDCs. We compare the impact of different types of noise in the QDC setting and explore various types of inter-QPU gate. Both individual inter-QPU gates and an assortment of larger distributed quantum circuits are investigated. Based on our findings, we evaluate strategies for the handling of noise, considering both quantum error detection and entanglement distillation based solutions. We also provide a preliminary investigation into the use of QDCs for generating entangled resource states suitable for quantum communications or measurement based quantum computing applications. A major contribution of this thesis is the development of a novel simulation framework for distributed quantum computing, which formed the basis of many of the results obtained. The framework enables users to easily specify distributed quantum circuits or import circuits designed for a single-QPU and convert them to a distributed circuit. Many of the complications of interpreting a distributed quantum circuit, such as the management of communication qubits are also handled automatically. Moreover, the framework's built-in interpreter can interpret common building blocks of distributed quantum computing, such as inter-QPU gates.
Quantum computers connected through classical and quantum communication channels can be combined to function as a single unit to run large quantum circuits that each device is unable to execute on their own. The distributed quantum computing paradigm is therefore often seen as a potential pathway to scaling quantum computing to capacities necessary for practical and large-scale applications. Whether connecting multiple quantum processing units (QPUs) in clusters or over networks, quantum communication requires entanglement to be generated and distributed over distances. Using entanglement, the remote CX protocol can be performed, which allows the application of the CX gate involving qubits located in different QPUs. In this work, we use a specialized simulation framework for a high-level evaluation of the impact of the protocol when executed under noise in various network configurations using different number of QPUs. We compare naive and graph partitioning qubit assignment strategies and how they affect the fidelity in experiments run on Grover, GHZ, VQC, and random circuits. The results provide insights on how QPU and network configurations or naive scheduling can degrade performance.
As quantum computers scale, single-chip architectures face inherent limitations in qubit count. This drives the need for modular quantum computing and quantum data centers (QDCs), where multiple quantum processor units (QPUs) are interconnected to enable the distributed execution of a quantum algorithm. However, evaluating distributed quantum computing (DQC) architectures is challenging. Classical simulation is limited by the exponential growth of the state vector, limiting its ability to model large systems and realistically capture hardware noise and timing. Meanwhile, implementing QDC introduces interconnect noise challenges such as transduction inefficiency and optical fiber loss. In this work, we introduce a hardware-based emulation framework by partitioning a single quantum processor’s qubit coupling map into multiple logical QPUs. We show how noise arising from transduction and optical fibers can be modeled by adding an ancilla qubit representing the environment, based on quantum collision dynamics. This model is then translated into a gate-based circuit, in which the couplings between each portion act as controllable noisy quantum communication channels. We demonstrate the framework on IBM quantum hardware by executing remote gates under controllable communication noise. To highlight the flexibility of the platform, we further replicate the implementation results of the distributed Grover’s search algorithm on an ion-trap system. Finally, we test a larger circuit, i.e., a five-qubit quantum Fourier transform (QFT), achieving reasonable fidelity across logical QPUs. Overall, the framework provides a scalable hardware-level emulation platform that captures noise sources through physical qubits and is compatible with any platform supporting the Qiskit SDK.
The main bottleneck for distributed quantum computing is the rate at which entanglement is produced between quantum processing units (QPUs). In this work, we prove that multiple QPUs connected through slow interconnects can outperform a monolithic architecture made with a single QPU. We consider a distributed quantum computing model with the following assumptions: (1) each QPU is linked to only two other QPUs, (2) each link produces only one Bell pair at a time, (3) the time to generate a Bell pair is τe times longer than the gate time. We propose a distributed version of the CliNR partial error correction scheme respecting these constraints and we show through circuit level simulations that, even if the entanglement generation time τe is up to five times longer than the gate time, distributed CliNR can achieve simultaneously a lower logical error rate and a shorter depth than both the direct implementation and the monolithic CliNR implementation of random Clifford circuits. In the asymptotic regime, we relax assumption (2) and we prove that links producing O(t/lnt) Bell pairs in parallel, where t is the number of QPUs, is sufficient to avoid stalling distributed CliNR, independently of the number of qubits per QPU. This demonstrates the potential of distributed CliNR for near-term multi-QPU devices. Moreover, we envision a distributed quantum superiority experiment based on the conjugated Clifford circuits of Bouland, Fitzsimons and Koh implemented with distributed CliNR.
Abstract Our recent work (Ayral et al. in Proceedings of IEEE computer society annual symposium on VLSI, ISVLSI, pp 138–140, 2020. 10.1109/ISVLSI49217.2020.00034 ) showed the first implementation of the Quantum Divide and Compute (QDC) method, which allows to break quantum circuits into smaller fragments with fewer qubits and shallower depth. This accommodates the limited number of qubits and short coherence times of quantum processors. This article investigates the impact of different noise sources—readout error, gate error and decoherence—on the success probability of the QDC procedure. We perform detailed noise modeling on the Atos Quantum Learning Machine, allowing us to understand tradeoffs and formulate recommendations about which hardware noise sources should be preferentially optimized. We also describe in detail the noise models we used to reproduce experimental runs on IBM’s Johannesburg processor. This article also includes a detailed derivation of the equations used in the QDC procedure to compute the output distribution of the original quantum circuit from the output distribution of its fragments. Finally, we analyze the computational complexity of the QDC method for the circuit under study via tensor-network considerations, and elaborate on the relation the QDC method with tensor-network simulation methods.