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arXiv:2406.06288 · IEEE International Conference on Quantum Computing and Engineering (QCE)

Identifying Bottlenecks of NISQ-Friendly HHL Algorithms

Marc Andreu Marfany, Alona Sakhnenko, Jeanette Miriam Lorenz

Published Sep 15, 2024• 5 citations
arXivHTMLPDF

Abstract

Quantum computing promises enabling solving large problem instances, e.g. large linear equation systems with HHL algorithm, once the hardware stack matures. For the foreseeable future quantum computing will remain in the so-called NISQ era, in which the algorithms need to account for the flaws of the hardware such as noise. In this work, we perform an empirical study to test scaling properties and directly related noise resilience of the the most resources-intense component of the HHL algorithm, namely QPE and its NISQ-adaptation Iterative QPE. We explore the effectiveness of noise mitigation techniques for these algorithms and investigate whether we can keep the gate number low by enforcing sparsity constraints on the input or using circuit optimization techniques provided by Qiskit package. Our results indicate that currently available noise mitigation techniques, such as Qiskit readout and Mthree readout packages, are insufficient for enabling results recovery even in the small instances tested here. Moreover, our results indicate that the scaling of these algorithms with increase in precision seems to be the most substantial obstacle. These insights allowed us to deduce an approximate bottleneck for algorithms that consider a similar time evolution as QPE. Such observations provide evidence of weaknesses of such algorithms on NISQ devices and help us formulate meaningful future research directions.

DOI
10.1109/qce60285.2024.00041

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Quantum computing promises enabling solving large problem instances, e.g. large linear equation systems with HHL algorithm, once the hardware stack matures. For the foreseeable future quantum computing will remain in the so-called NISQ era, in which the algorithms need to account for the flaws of the hardware such as noise. In this work, we perform an empirical study to test scaling properties and directly related noise resilience of the the most resources-intense component of the HHL algorithm, namely QPE and its NISQ-adaptation Iterative QPE. We explore the effectiveness of noise mitigation techniques for these algorithms and investigate whether we can keep the gate number low by enforcing sparsity constraints on the input or using circuit optimization techniques provided by Qiskit package. Our results indicate that currently available noise mitigation techniques, such as Qiskit readout and Mthree readout packages, are insufficient for enabling results recovery even in the small instances tested here. Moreover, our results indicate that the scaling of these algorithms with increase in precision seems to be the most substantial obstacle. These insights allowed us to deduce an approximate bottleneck for algorithms that consider a similar time evolution as QPE. Such observations provide evidence of weaknesses of such algorithms on NISQ devices and help us formulate meaningful future research directions.
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The rapid evolution of Noisy Intermediate-Scale Quantum (NISQ) devices has intensified the need for robust compilation strategies capable of mitigating hardware-induced errors while maximizing computational efficiency. Quantum compilers play a pivotal role in translating high-level quantum algorithms into hardware-executable instructions, yet they face significant challenges related to qubit connectivity constraints, limited coherence times, and stochastic noise. This paper examines error-resilient quantum compiler design for efficient qubit mapping, gate optimization, and noise mitigation in NISQ-era devices, proposing a framework that integrates topology-aware mapping, adaptive gate synthesis, and probabilistic error suppression techniques. By synthesizing advances in quantum circuit optimization, hardware-aware scheduling, and hybrid classical–quantum error correction strategies, the study evaluates how compiler-level innovations can substantially enhance execution fidelity and resource efficiency. The findings suggest that intelligent compiler architectures are critical enablers of practical quantum advantage during the transitional NISQ phase, bridging theoretical algorithm design with real-world hardware constraints.
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The Quantum Approximate Optimization Algorithm (QAOA) is widely regarded as a promising near-term quantum algorithm for addressing hard combinatorial optimization problems on Noisy Intermediate-Scale Quantum (NISQ) devices; however, its real-world effectiveness is severely constrained by hardware noise, including gate infidelities, decoherence, and measurement errors. This work explores an error mitigation–driven approach to enhance the performance and robustness of QAOA without altering its algorithmic structure or requiring fault-tolerant quantum resources. Measurement error mitigation and zero-noise extrapolation are incorporated into the execution and post-processing stages of QAOA circuits and evaluated using the Minimum Vertex Cover problem as a representative benchmark. Performance is assessed through approximation ratios, solution stability, and noise sensitivity across multiple circuit depths. The results indicate that error mitigation not only improves approximation accuracy but also stabilizes output distributions and delays performance degradation at increased circuit depths. Additionally, the mitigated executions demonstrate better consistency across repeated runs, highlighting improved resilience to stochastic noise. These findings emphasize that lightweight and hardware-efficient error mitigation techniques can significantly extend the practical usability of QAOA on current NISQ hardware, providing a scalable and realistic pathway for executing quantum optimization algorithms more reliably in near-term quantum computing environments.