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arXiv:2405.16275 · IEEE International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC)

Assessing the Role of Communication in Scalable Multi-Core Quantum Architectures

Maurizio Palesi, Enrico Russo, Davide Patti, Giuseppe Ascia, Vincenzo Catania

Published Dec 16, 2024• 3 citations
arXivHTMLPDF

Abstract

Multi-core quantum architectures offer a solution to the scalability limitations of traditional monolithic designs. However, dividing the system into multiple chips introduces a critical bottleneck: communication between cores. This paper introduces qcomm, a simulation tool designed to assess the impact of communication on the performance of scalable multi-core quantum architectures. Qcomm allows users to adjust various architectural and physical parameters of the system, and outputs various communication metrics. We use qcomm to perform a preliminary study on how these parameters affect communication performance in a multi-core quantum system.

DOI
10.1109/mcsoc64144.2024.00085

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Multi-core quantum architectures offer a solution to the scalability limitations of traditional monolithic designs. However, dividing the system into multiple chips introduces a critical bottleneck: communication between cores. This paper introduces qcomm, a simulation tool designed to assess the impact of communication on the performance of scalable multi-core quantum architectures. Qcomm allows users to adjust various architectural and physical parameters of the system, and outputs various communication metrics. We use qcomm to perform a preliminary study on how these parameters affect communication performance in a multi-core quantum system.
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Current monolithic quantum computer architectures have limited scalability. One promising approach for scaling them up is to use a modular or multi-core architecture, in which different quantum processors (cores) are connected via quantum and classical links. This new architectural design poses new challenges such as the expensive inter-core communication. To reduce these movements when executing a quantum algorithm, an efficient mapping technique is required. In this paper, a detailed critical discussion of the quantum circuit mapping problem for multi-core quantum computing architectures is provided. In addition, we further explore the performance of a mapping method, which is formulated as a partitioning over time graph problem, by performing an architectural scalability analysis.