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arXiv:2405.01447 · Quantum Science and Technology

Digital-analog counterdiabatic quantum optimization with trapped ions

Shubham Kumar, Narendra N. Hegade, Murilo Henrique de Oliveira, E. Solano, Alejandro Gomez Cadavid, F. Albarrán-Arriagada

Published Oct 25, 2024• 6 citations
arXivHTMLPDF

Abstract

Abstract We introduce a hardware-specific, problem-dependent digital-analog quantum algorithm of a counterdiabatic quantum dynamics tailored for optimization problems. Specifically, we focus on trapped-ion architectures, taking advantage from global Mølmer–Sørensen gates as the analog interactions complemented by digital gates, both of which are available in the state-of-the-art technologies. We show an optimal configuration of analog blocks and digital steps leading to a substantial reduction in circuit depth compared to the purely digital approach. This implies that, using the proposed encoding, we can address larger optimization problem instances, requiring more qubits, while preserving the coherence time of current devices. Furthermore, we study the minimum gate fidelity required by the analog blocks to outperform the purely digital simulation, finding that it is below the best fidelity reported in the literature. To validate the performance of the digital-analog encoding, we tackle the maximum independent set problem, showing that it requires fewer resources compared to the digital case. This hybrid co-design approach paves the way towards quantum advantage for efficient solutions of quantum optimization problems.

DOI
10.1088/2058-9565/ad8b64

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We introduce a digital-analog quantum computing framework that enables counterdiabatic protocols to be implemented at constant circuit depth, allowing fast and resource-efficient quantum state preparation on current quantum hardware. Counterdiabatic protocols suppress diabatic excitations in finite-time adiabatic evolution, but their practical application is limited by the non-local structure of the required Hamiltonians and the resource overhead of fully digital implementations. Counterdiabatic terms can be expressed as truncated expansions of nested commutators of the adiabatic Hamiltonian and its parametric derivative. Here, we show how this algebraic structure can be efficiently realized in a digital-analog setting using commutator product formulas. Using native multi-qubit analog interactions augmented by local single-qubit rotations, this approach enables higher-order counterdiabatic protocols whose implementation requires a constant number of analog blocks for any fixed truncation order, independent of system size. We demonstrate the method for two-dimensional spin models and analyze the associated approximation errors. These results show that digital-analog quantum computing enables a qualitatively new resource scaling for counterdiabatic protocols and related quantum control primitives, with direct implications for quantum simulation, optimization, and algorithmic state preparation on current quantum devices.
We propose a faster digital quantum algorithm for portfolio optimization using the digitized counterdiabatic quantum optimization paradigm in the impulse regime, that is, where the counterdiabatic terms are dominant. Our approach notably reduces the circuit depth requirement of the algorithm and enhances the solution accuracy, making it suitable for current quantum processors. We apply this protocol to a real-case scenario of portfolio optimization with 20 assets, using purely quantum and hybrid classical-quantum paradigms. We demonstrate the advantages of our protocol using up to 20 qubits on an IonQ trapped-ion quantum computer. By benchmarking our method against the standard quantum approximate optimization algorithm and finite-time digitized adiabatic algorithms, we obtain a significant reduction in the circuit depth by factors of 2.5 to 40, while minimizing the dependence on the classical optimization subroutine. Besides portfolio optimization, the proposed method is applicable to a large class of combinatorial optimization problems.
Universal digital quantum computers are able to approximate any Hamiltonian evolution as a digital quantum circuit consisting of discrete time steps. Strongly interacting physics models, for example in high-energy physics or materials science, make this a challenging task for near-term devices as they place a high demand on the quantum resources required [1]. One alternative is analog quantum simulation where the native evolution of a quantum system can be tailored to mimic that of the model of interest. While more efficient at specific problems, there are limits on the types of evolution available and on the observables that can be measured. In this conference paper we present first results towards unifying these two concepts in a trapped-ion experiment. Trapped atomic ions are one of the most advanced experimental platforms for both analog quantum simulation and digital quantum computing. Typically, the internal spin degrees of freedom are used qubits or for the simulation of spin models. The harmonic oscillator modes given by the motion of the ions in the trap are only employed transiently to create quantum gates or spin-spin interactions. However, these motional modes constitute a large Hilbert space themselves and present a bosonic degree of freedom, which is costly to model with qubits. Many systems of interest, for example Lattice gauge theories, require both spin and boson degrees of freedom. It was recently shown that they can be encoded more efficiently using the harmonic oscillator modes directly [2].
Abstract The immense resource overhead of full quantum error correction (QEC) presents a formidable barrier to achiev- ing fault-tolerant quantum computation. This paper introduces a hybrid analog-digital quantum processor architecture designed as a pragmatic strategy for achieving ”mid-scale fault tolerance” (MSFT). We formally define MSFT as a hardware-level error suppression scheme that achieves a fidelity gain by replacing deep, error-prone digital gate sequences with single, high-fidelity analog evolution blocks. The architecture comprises a programmable digital core for state preparation and measurement, coupled to an analog co-processor that executes computationally intensive Hamiltonian evolutions. This approach reduces the effective logical depth and error accumulation for algorithms like VQE. We validate this claim with statistically robust simulations on standard molecular Hamiltonians (LiH and BeH), demonstrating a significant performance advantage over purely digital systems based on an aggregation of 50 independent simulation trials. The analysis includes scalability and a discussion of the critical digital-analog interface, proposing trapped-ion and neutral-atom systems as viable physical platforms
Abstract The immense resource overhead of full quantum error correction (QEC) presents a formidable barrier to achieving fault-tolerant quantum computation. This paper introduces a hybrid analog-digital quantum processor architecture designed as a pragmatic strategy for achieving "mid-scale fault tolerance" (MSFT). We formally define MSFT as a hardware-level error suppression scheme that achieves a fidelity gain by replacing deep, error-prone digital gate sequences with single, high-fidelity analog evolution blocks. The architecture comprises a programmable digital core for state preparation and measurement, coupled to an analog co-processor that executes computationally intensive Hamiltonian evolutions. This approach reduces the effective logical depth and error accumulation for algorithms like VQE. We validate this claim with statistically robust simulations on standard molecular Hamiltonians (LiH and BeH₂), demonstrating a significant performance advantage over purely digital systems based on an aggregation of 50 independent simulation trials. The analysis includes scalability and a discussion of the critical digital-analog interface, proposing trapped-ion and neutral-atom systems as viable physical platforms.
Abstract Quantum computing holds the potential for quantum advantage in optimization problems, which requires advances in quantum algorithms and hardware specifications. Adiabatic quantum optimization is conceptually a valid solution that suffers from limited hardware coherence times. In this sense, counterdiabatic quantum protocols provide a shortcut to this process, steering the system along its ground state with fast-changing Hamiltonian. In this work, we take full advantage of a digitized-counterdiabatic quantum optimization algorithm to find an optimal solution of the p -spin model up to four-local interactions. We choose a suitable scheduling function and initial Hamiltonian such that a single-layer quantum circuit suffices to produce a good ground-state overlap. By further optimizing parameters using variational methods, we solve with unit accuracy two-spin, three-spin, and four-spin problems for 100%, 93%, and 83% of instances, respectively. As a particular case of the latter, we also solve factorization problems involving 5, 9, and 12 qubits. Due to the low computational overhead, our compact approach may become a valuable tool towards quantum advantage in the NISQ era.