Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:2403.03717

A multiplexed control architecture for superconducting qubits with row-column addressing

Zhao, Peng

Published Mar 6, 2024• 1 citation
arXivHTMLPDF

Abstract

In state-of-the-art superconducting quantum processors, each qubit is controlled by at least one control line that delivers control pulses generated at room temperature to qubits operating at millikelvin temperatures. While this strategy has been successfully applied to control hundreds of qubits, it is unlikely to be scalable to control thousands of qubits, let alone millions or even billions of qubits needed in fault-tolerance quantum computing. The primary obstacle lies in the wiring challenge, wherein the number of accommodated control lines is limited by factors, such as the cooling power, physical space of the cryogenic system, the control footprint area at the qubit chip level, and so on. Here, we introduce a multiplexed control architecture for superconducting qubits with two types of shared control lines, row and column lines, providing an efficient approach for parallel controlling $N$ qubits with $O(\sqrt{N})$ control lines. With the combination of the two-type shared lines, unique pairs of control pulses are delivered to qubits at each row-column intersection, enabling parallel qubit addressing. Of particular concern here is that, unlike traditional gate schemes, both single- and two-qubit gates are implemented with pairs of control pulses. Considering the inherent parallelism and the control limitations, the integration of the architecture into quantum computing systems should be tailored as much as possible to the specific properties of the quantum circuits to be executed. As such, the architecture could be scalable for executing structured quantum circuits, such as quantum error correction circuits.

DOI
10.48550/arxiv.2403.03717

Related papers

Multiplexed control scheme for scalable quantum information processing with superconducting qubits

Shi, Pan, Jiahao Yuan, Fei Yan +1 more

The advancement of scalable quantum information processing relies on the accurate and parallel manipulation of a vast number of qubits, potentially reaching into the millions. Superconducting qubits, traditionally controlled through individual circuitry, currently face a formidable scalability challenge due to the excessive use of wires. This challenge is nearing a critical point where it might soon surpass the capacities of on-chip routing, I/O packaging, testing platforms, and economically feasible solutions. Here we introduce a multiplexed control scheme that efficiently utilizes shared control lines for operating multiple qubits and couplers. By integrating quantum hardware-software co-design, our approach utilizes advanced techniques like frequency multiplexing and individual tuning. This enables simultaneous and independent execution of single- and two-qubit gates with significantly simplified wiring. This scheme has the potential to diminish the number of control lines by one to two orders of magnitude in the near future, thereby substantially enhancing the scalability of superconducting quantum processors.

arXiv:2312.06911•Dec 12, 2023•3 citations

Multiplexed double-transmon coupler scheme in scalable superconducting quantum processor

Tianqi Cai, Chitong Chen, Kunliang Bu +7 more

Precise control of superconducting qubits is essential for advancing both quantum simulation and quantum error correction. Recently, transmon qubit systems employing the single-transmon coupler (STC) scheme have demonstrated high-fidelity single- and two-qubit gate operations by dynamically tuning the effective coupling between qubits. However, the integration of STCs increases the number of control lines, thereby posing a significant bottleneck for chip routing and scalability. To address this challenge, we propose a robust control line multiplexing scheme based on a double-transmon coupler (DTC) architecture, which enables shared coupler control lines to substantially reduce wiring complexity. Moreover, we experimentally verify that this multiplexed configuration efficiently suppresses undesirable static $ZZ$ coupling while maintaining accurate control over two-qubit gate operations. We further demonstrate the feasibility of the architecture through two distinct gate implementations: a fast coupler $Z$-control-based CZ gate and a parametric iSWAP gate. To validate the practical applicability of this multiplexing approach in quantum circuits, we prepare Bell and three-qubit GHZ states using the proposed scheme with fidelity exceeding 99% and 96%, respectively. This multiplexed DTC architecture offers significant potential to minimize wiring overhead in two-dimensional qubit arrays, thereby greatly enhancing the scalability of superconducting quantum processors.

quant-pharXiv:2511.02249•Nov 5, 2025•0 citations

A Control Line Multiplexing Framework for Scalable Quantum Computing

Dayu Li, Naibin Zhou, Zhiyuan Chen +39 more

Universal fault-tolerant superconducting quantum computers are expected to require millions of physical qubits; yet extending the prevailing dedicated-control-line paradigm to this scale would exceed the wiring density and cooling-power budget of dilution refrigerators. Microwave frequency-division multiplexing (FDM) revolutionized classical communications by enabling many independent channels to share common transmission infrastructure. Translating this principle to superconducting quantum control, however, requires an all-microwave architecture and experimental validation of frequency-multiplexed gate control. Recent work in quantum error correction has demonstrated microwave-based readout, single-qubit gates and leakage suppression, whereas two-qubit gates remain predominantly driven by unipolar pulses and thus constitute the missing element of an all-microwave architecture. Here, we propose a periodically extensible hybrid multiplexing framework in which all gate operations are frequency-division multiplexed using polychromatic microwave pulses and band-pass filters, thereby reducing the required control-line count by one to two orders of magnitude. In a 1:4 demonstration, we achieve average errors of $(6.4\pm0.2)\times10^{-3}$ for parallel FDM CZ gates and $(10.6\pm0.2)\times10^{-4}$ for parallel FDM $XY(π/2)$ gates, without statistically significant multiplexing-induced degradation. Together with on-chip DC sources, this FDM-based gate-control scheme completes the last missing module in a scalable multiplexed-control architecture toward universal fault-tolerant quantum computing.

quant-pharXiv:2610.35227•Oct 27, 2026•0 citations

Scalable Cryoelectronics for Superconducting Qubit Control and Readout

Meraj Ahmad, Christos Giagkoulovits, Sergey Danilin +2 more

Quantum computing promises an exponentially higher computational power than classical computers; although all the building blocks have become available, certain constraints still prevent quantum advantage. The fundamental challenge in building a practical quantum computer is integrating thousands of highly coherent qubits with the control and readout electronics. The need for a high‐coherence qubit drives the effort for quantum error correction algorithms to create fault‐tolerant quantum systems. Error correction becomes tangible in a quantum processor only in large numbers of qubits. Thus, the other challenge is reducing the number of physical interconnects (coaxial lines) between the quantum–classical interface and bulky room‐temperature electronics. To interface thousands of qubits, interconnects can be reduced by bringing the control and readout electronics near the quantum processor. Cryogenic complementary metal–oxide–semiconductor (CMOS) technology has been an ideal candidate for this purpose. Integrated control and readout at cryogenic temperatures require low power dissipation circuit designs and techniques such as frequency‐division multiplexing (FDM) due to the finite cooling power of a dilution refrigerator. Herein, an overview of each building block in a superconducting quantum computer is provided, focusing on scalability. Furthermore, this article is concluded with an outlook discussing current challenges and future directions for the scalable superconducting control and readout.

Advanced Intelligent Systems•May 26, 2022•12 citations

A crossbar network for silicon quantum dot qubits

Ruoyu Li, Luca Petit, David P. Franke +10 more

The spin states of single electrons in gate-defined quantum dots satisfy crucial requirements for a practical quantum computer. These include extremely long coherence times, high-fidelity quantum operation, and the ability to shuttle electrons as a mechanism for on-chip flying qubits. To increase the number of qubits to the thousands or millions of qubits needed for practical quantum information, we present an architecture based on shared control and a scalable number of lines. Crucially, the control lines define the qubit grid, such that no local components are required. Our design enables qubit coupling beyond nearest neighbors, providing prospects for nonplanar quantum error correction protocols. Fabrication is based on a three-layer design to define qubit and tunnel barrier gates. We show that a double stripline on top of the structure can drive high-fidelity single-qubit rotations. Self-aligned inhomogeneous magnetic fields induced by direct currents through superconducting gates enable qubit addressability and readout. Qubit coupling is based on the exchange interaction, and we show that parallel two-qubit gates can be performed at the detuning-noise insensitive point. While the architecture requires a high level of uniformity in the materials and critical dimensions to enable shared control, it stands out for its simplicity and provides prospects for large-scale quantum computation in the near future.

arXiv:1711.03807•Science Advances•Jul 6, 2018•279 citations

A crossbar network for silicon quantum dot qubits

Ruoyu Li, Luca Petit, David P. Franke +10 more

Copyright © 2018 The Authors. The spin states of single electrons in gate-defined quantum dots satisfy crucial requirements for a practical quantum computer. These include extremely long coherence times, high-fidelity quantum operation, and the ability to shuttle electrons as a mechanism for on-chip flying qubits. To increase the number of qubits to the thousands or millions of qubits needed for practical quantum information, we present an architecture based on shared control and a scalable number of lines. Crucially, the control lines define the qubit grid, such that no local components are required. Our design enables qubit coupling beyond nearest neighbors, providing prospects for nonplanar quantum error correction protocols. Fabrication is based on a three-layer design to define qubit and tunnel barrier gates. We show that a double stripline on top of the structure can drive high-fidelity single-qubit rotations. Self-aligned inhomogeneous magnetic fields induced by direct currents through superconducting gates enable qubit addressability and readout. Qubit coupling is based on the exchange interaction, and we show that parallel two-qubit gates can be performed at the detuning-noise insensitive point. While the architecture requires a high level of uniformity in the materials and critical dimensions to enable shared control, it stands out for its simplicity and provides prospects for large-scale quantum computation in the near future.

•Jan 1, 2018•231 citations
In state-of-the-art superconducting quantum processors, each qubit is controlled by at least one control line that delivers control pulses generated at room temperature to qubits operating at millikelvin temperatures. While this strategy has been successfully applied to control hundreds of qubits, it is unlikely to be scalable to control thousands of qubits, let alone millions or even billions of qubits needed in fault-tolerance quantum computing. The primary obstacle lies in the wiring challenge, wherein the number of accommodated control lines is limited by factors, such as the cooling power, physical space of the cryogenic system, the control footprint area at the qubit chip level, and so on. Here, we introduce a multiplexed control architecture for superconducting qubits with two types of shared control lines, row and column lines, providing an efficient approach for parallel controlling NNN qubits with O(N)O(\sqrt{N})O(N​) control lines. With the combination of the two-type shared lines, unique pairs of control pulses are delivered to qubits at each row-column intersection, enabling parallel qubit addressing. Of particular concern here is that, unlike traditional gate schemes, both single- and two-qubit gates are implemented with pairs of control pulses. Considering the inherent parallelism and the control limitations, the integration of the architecture into quantum computing systems should be tailored as much as possible to the specific properties of the quantum circuits to be executed. As such, the architecture could be scalable for executing structured quantum circuits, such as quantum error correction circuits.
The advancement of scalable quantum information processing relies on the accurate and parallel manipulation of a vast number of qubits, potentially reaching into the millions. Superconducting qubits, traditionally controlled through individual circuitry, currently face a formidable scalability challenge due to the excessive use of wires. This challenge is nearing a critical point where it might soon surpass the capacities of on-chip routing, I/O packaging, testing platforms, and economically feasible solutions. Here we introduce a multiplexed control scheme that efficiently utilizes shared control lines for operating multiple qubits and couplers. By integrating quantum hardware-software co-design, our approach utilizes advanced techniques like frequency multiplexing and individual tuning. This enables simultaneous and independent execution of single- and two-qubit gates with significantly simplified wiring. This scheme has the potential to diminish the number of control lines by one to two orders of magnitude in the near future, thereby substantially enhancing the scalability of superconducting quantum processors.
Precise control of superconducting qubits is essential for advancing both quantum simulation and quantum error correction. Recently, transmon qubit systems employing the single-transmon coupler (STC) scheme have demonstrated high-fidelity single- and two-qubit gate operations by dynamically tuning the effective coupling between qubits. However, the integration of STCs increases the number of control lines, thereby posing a significant bottleneck for chip routing and scalability. To address this challenge, we propose a robust control line multiplexing scheme based on a double-transmon coupler (DTC) architecture, which enables shared coupler control lines to substantially reduce wiring complexity. Moreover, we experimentally verify that this multiplexed configuration efficiently suppresses undesirable static ZZZZZZ coupling while maintaining accurate control over two-qubit gate operations. We further demonstrate the feasibility of the architecture through two distinct gate implementations: a fast coupler ZZZ-control-based CZ gate and a parametric iSWAP gate. To validate the practical applicability of this multiplexing approach in quantum circuits, we prepare Bell and three-qubit GHZ states using the proposed scheme with fidelity exceeding 99% and 96%, respectively. This multiplexed DTC architecture offers significant potential to minimize wiring overhead in two-dimensional qubit arrays, thereby greatly enhancing the scalability of superconducting quantum processors.
Universal fault-tolerant superconducting quantum computers are expected to require millions of physical qubits; yet extending the prevailing dedicated-control-line paradigm to this scale would exceed the wiring density and cooling-power budget of dilution refrigerators. Microwave frequency-division multiplexing (FDM) revolutionized classical communications by enabling many independent channels to share common transmission infrastructure. Translating this principle to superconducting quantum control, however, requires an all-microwave architecture and experimental validation of frequency-multiplexed gate control. Recent work in quantum error correction has demonstrated microwave-based readout, single-qubit gates and leakage suppression, whereas two-qubit gates remain predominantly driven by unipolar pulses and thus constitute the missing element of an all-microwave architecture. Here, we propose a periodically extensible hybrid multiplexing framework in which all gate operations are frequency-division multiplexed using polychromatic microwave pulses and band-pass filters, thereby reducing the required control-line count by one to two orders of magnitude. In a 1:4 demonstration, we achieve average errors of (6.4±0.2)×10−3(6.4\pm0.2)\times10^{-3}(6.4±0.2)×10−3 for parallel FDM CZ gates and (10.6±0.2)×10−4(10.6\pm0.2)\times10^{-4}(10.6±0.2)×10−4 for parallel FDM XY(π/2)XY(π/2)XY(π/2) gates, without statistically significant multiplexing-induced degradation. Together with on-chip DC sources, this FDM-based gate-control scheme completes the last missing module in a scalable multiplexed-control architecture toward universal fault-tolerant quantum computing.
Quantum computing promises an exponentially higher computational power than classical computers; although all the building blocks have become available, certain constraints still prevent quantum advantage. The fundamental challenge in building a practical quantum computer is integrating thousands of highly coherent qubits with the control and readout electronics. The need for a high‐coherence qubit drives the effort for quantum error correction algorithms to create fault‐tolerant quantum systems. Error correction becomes tangible in a quantum processor only in large numbers of qubits. Thus, the other challenge is reducing the number of physical interconnects (coaxial lines) between the quantum–classical interface and bulky room‐temperature electronics. To interface thousands of qubits, interconnects can be reduced by bringing the control and readout electronics near the quantum processor. Cryogenic complementary metal–oxide–semiconductor (CMOS) technology has been an ideal candidate for this purpose. Integrated control and readout at cryogenic temperatures require low power dissipation circuit designs and techniques such as frequency‐division multiplexing (FDM) due to the finite cooling power of a dilution refrigerator. Herein, an overview of each building block in a superconducting quantum computer is provided, focusing on scalability. Furthermore, this article is concluded with an outlook discussing current challenges and future directions for the scalable superconducting control and readout.
The spin states of single electrons in gate-defined quantum dots satisfy crucial requirements for a practical quantum computer. These include extremely long coherence times, high-fidelity quantum operation, and the ability to shuttle electrons as a mechanism for on-chip flying qubits. To increase the number of qubits to the thousands or millions of qubits needed for practical quantum information, we present an architecture based on shared control and a scalable number of lines. Crucially, the control lines define the qubit grid, such that no local components are required. Our design enables qubit coupling beyond nearest neighbors, providing prospects for nonplanar quantum error correction protocols. Fabrication is based on a three-layer design to define qubit and tunnel barrier gates. We show that a double stripline on top of the structure can drive high-fidelity single-qubit rotations. Self-aligned inhomogeneous magnetic fields induced by direct currents through superconducting gates enable qubit addressability and readout. Qubit coupling is based on the exchange interaction, and we show that parallel two-qubit gates can be performed at the detuning-noise insensitive point. While the architecture requires a high level of uniformity in the materials and critical dimensions to enable shared control, it stands out for its simplicity and provides prospects for large-scale quantum computation in the near future.
Copyright © 2018 The Authors. The spin states of single electrons in gate-defined quantum dots satisfy crucial requirements for a practical quantum computer. These include extremely long coherence times, high-fidelity quantum operation, and the ability to shuttle electrons as a mechanism for on-chip flying qubits. To increase the number of qubits to the thousands or millions of qubits needed for practical quantum information, we present an architecture based on shared control and a scalable number of lines. Crucially, the control lines define the qubit grid, such that no local components are required. Our design enables qubit coupling beyond nearest neighbors, providing prospects for nonplanar quantum error correction protocols. Fabrication is based on a three-layer design to define qubit and tunnel barrier gates. We show that a double stripline on top of the structure can drive high-fidelity single-qubit rotations. Self-aligned inhomogeneous magnetic fields induced by direct currents through superconducting gates enable qubit addressability and readout. Qubit coupling is based on the exchange interaction, and we show that parallel two-qubit gates can be performed at the detuning-noise insensitive point. While the architecture requires a high level of uniformity in the materials and critical dimensions to enable shared control, it stands out for its simplicity and provides prospects for large-scale quantum computation in the near future.