This paper presents strategies to improve the performance of digitized counterdiabatic quantum optimization algorithms by cooptimizing gate sequences, algorithm parameters, and qubit mapping. Demonstrations on real hardware validate the effectiveness of these strategies, leveraging both algorithmic and hardware advantages. Specifically, our approach achieves an average increase in approximation ratio of $4.49\ifmmode\times\else\texttimes\fi{}$ without error mitigation and 84.8% with error mitigation compared to Qiskit and Tket on IBM quantum processors. These findings provide valuable insights into the codesign of algorithm implementation, tailored to optimize qubit mapping and algorithm parameters, with broader implications for enhancing algorithm performance on near-term quantum devices.
This paper presents strategies to improve the performance of digitized counterdiabatic quantum optimization algorithms by cooptimizing gate sequences, algorithm parameters, and qubit mapping. Demonstrations on real hardware validate the effectiveness of these strategies, leveraging both algorithmic and hardware advantages. Specifically, our approach achieves an average increase in approximation ratio of 4.49\ifmmode×\else\texttimes\fi without error mitigation and 84.8% with error mitigation compared to Qiskit and Tket on IBM quantum processors. These findings provide valuable insights into the codesign of algorithm implementation, tailored to optimize qubit mapping and algorithm parameters, with broader implications for enhancing algorithm performance on near-term quantum devices.
Codesign, an integral part of computer architecture referring to the information interaction in hardware-software stack, is able to boost the algorithm mapping and execution in the computer hardware. This well applies to the noisy intermediate-scale quantum era, where quantum algorithms and quantum processors both need to be shaped to allow for advantages in experimental implementations. The state-of-the-art quantum adiabatic optimization algorithm faces challenges for scaling up, where the deteriorating optimization performance is not necessarily alleviated by increasing the circuit depth given the noise in the hardware. The counterdiabatic term can be introduced to accelerate the convergence, but decomposing the unitary operator corresponding to the counterdiabatic terms into one and two-qubit gates may add additional burden to the digital circuit depth. In this work, we focus on the counterdiabatic protocol with a codesigned approach to implement this algorithm on a photonic quantum processor. The tunable Mach-Zehnder interferometer mesh provides rich programmable parameters for local and global manipulation, making it able to perform arbitrary unitary evolutions. Accordingly, we directly implement the unitary operation associated to the counterdiabatic quantum optimization on our processor without prior digitization. Furthermore, we develop and implement an optimized counterdiabatic method by tackling the higher-order many-body interaction terms. Moreover, we benchmark the performance in the case of factorization, by comparing the final success probability and the convergence speed. In conclusion, we experimentally demonstrate the advantages of a codesigned mapping of counterdiabatic quantum dynamics for quantum computing on photonic platforms.
We introduce a method for solving combinatorial optimization problems on digital quantum computers, where we incorporate auxiliary counterdiabatic (CD) terms into the adiabatic Hamiltonian, while integrating bias terms derived from an iterative digitized counterdiabatic quantum algorithm. We call this protocol bias-field digitized counterdiabatic quantum optimization (BF-DCQO). Designed to effectively tackle large-scale combinatorial optimization problems, BF-DCQO demonstrates resilience against the limitations posed by the restricted coherence times of current quantum processors and shows clear enhancement even in the presence of noise. Additionally, our purely quantum approach eliminates the dependency on classical optimization required in hybrid classical-quantum schemes, thereby circumventing the trainability issues often associated with variational quantum algorithms. Through the analysis of an all-to-all connected general Ising spin-glass problem, we exhibit a polynomial scaling enhancement in ground-state success probability compared to traditional DCQO and finite-time adiabatic quantum optimization methods. Furthermore, it achieves scaling improvements in ground-state success probabilities, increasing by up to two orders of magnitude, and offers an average 1.3 × better approximation ratio than the quantum approximate optimization algorithm for the problem sizes studied. We validate these findings through experimental implementations on both trapped-ion quantum computers and superconducting processors, tackling a maximum weighted independent set problem with 36 qubits and a spin glass on a heavy-hexagonal lattice with 100 qubits, respectively. These results mark a significant advancement in gate-based quantum computing, employing a fully quantum algorithmic approach.
Abstract We introduce a hardware-specific, problem-dependent digital-analog quantum algorithm of a counterdiabatic quantum dynamics tailored for optimization problems. Specifically, we focus on trapped-ion architectures, taking advantage from global Mølmer–Sørensen gates as the analog interactions complemented by digital gates, both of which are available in the state-of-the-art technologies. We show an optimal configuration of analog blocks and digital steps leading to a substantial reduction in circuit depth compared to the purely digital approach. This implies that, using the proposed encoding, we can address larger optimization problem instances, requiring more qubits, while preserving the coherence time of current devices. Furthermore, we study the minimum gate fidelity required by the analog blocks to outperform the purely digital simulation, finding that it is below the best fidelity reported in the literature. To validate the performance of the digital-analog encoding, we tackle the maximum independent set problem, showing that it requires fewer resources compared to the digital case. This hybrid co-design approach paves the way towards quantum advantage for efficient solutions of quantum optimization problems.
Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit design in maximizing the performance and robustness of algorithms on near-term quantum devices. By utilizing eight IBM quantum devices, we analyze how hardware features and algorithm design impact the effectiveness of DD for error mitigation. Our analysis takes into account factors such as circuit fidelity, scheduling duration, and hardware-native gate set. We also examine the influence of algorithmic implementation details, including specific gate decompositions, DD sequences, and optimization levels. The results reveal an inverse relationship between the effectiveness of DD and the inherent performance of the algorithm. Furthermore, we emphasize the importance of gate directionality and circuit symmetry in improving performance. This study offers valuable insights for optimizing DD protocols and circuit designs, highlighting the significance of a holistic approach that leverages both hardware features and algorithm design for the high-quality and reliable execution of near-term quantum algorithms.
Dynamical decoupling (DD) is a promising technique for mitigating errors in near-term quantum devices. However, its effectiveness depends on both hardware characteristics and algorithm implementation details. This paper explores the synergistic effects of dynamical decoupling and optimized circuit design in maximizing the performance and robustness of algorithms on near-term quantum devices. By utilizing eight IBM quantum devices, we analyze how hardware features and algorithm design impact the effectiveness of DD for error mitigation. Our analysis takes into account factors such as circuit fidelity, scheduling duration, and hardware-native gate set. We also examine the influence of algorithmic implementation details, including specific gate decompositions, DD sequences, and optimization levels. The results reveal an inverse relationship between the effectiveness of DD and the inherent performance of the algorithm. Furthermore, we emphasize the importance of gate directionality and circuit symmetry in improving performance. This study offers valuable insights for optimizing DD protocols and circuit designs, highlighting the significance of a holistic approach that leverages both hardware features and algorithm design for the high-quality and reliable execution of near-term quantum algorithms.
We study a job-shop scheduling problem for an automatized robot in a high-throughput laboratory and a traveling-salesperson problem with recently proposed digitized counterdiabatic quantum optimization (DCQO) algorithms. In DCQO, we find the solution of an optimization problem via an adiabatic quantum dynamics, which is accelerated with counterdiabatic protocols. Thereafter, we digitize the global unitary to encode it in a digital quantum computer. For the job-shop scheduling problem, we aim at finding the optimal schedule for a robot executing a number of tasks under specific constraints, such that the total execution time of the process is minimized. For the traveling-salesperson problem, the goal is to find the path that covers all cities and is associated with the shortest traveling distance. We consider both hybrid and pure versions of DCQO algorithms and benchmark the performance against digitized quantum annealing and the quantum approximate optimization algorithm (QAOA). In comparison to QAOA, the DCQO solution is improved by several orders of magnitude in success probability using the same number of two-qubit gates. Moreover, we implement our algorithms on cloud-based superconducting and trapped-ion quantum processors. Our results demonstrate that circuit compression using counterdiabatic protocols is amenable to current noisy intermediate-scale quantum hardware and can solve logistics scheduling problems, where other digital quantum algorithms show insufficient performance.