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arXiv:2308.12423 · Physical Review Applied

Design and execution of quantum circuits using tens of superconducting qubits and thousands of gates for dense Ising optimization problems

Filip B. Maciejewski, Stuart Hadfield, Benjamin Hall, Mark J. Hodson, Maxime Dupont, Bram Evert, James Sud, M. Sohaib Alam, Zhihui Wang, Stephen Jeffrey, Bhuvanesh Sundar, P. Aaron Lott, Shon R. Grabbe, Eleanor Gilbert Rieffel, Matthew J. Reagor, Davide Venturelli

Published Oct 28, 2024• 20 citations
arXivHTMLPDF

Abstract

We develop a hardware-efficient ansatz for variational optimization, derived from existing ansatzes in the literature, that parametrizes subsets of all interactions in the cost Hamiltonian in each layer. We treat gate orderings as a variational parameter and observe that doing so can provide significant performance boosts in experiments. We carried out experimental demonstration runs of a compilation-optimized implementation of fully connected Sherrington-Kirkpatrick Hamiltonians on a 50-qubit linear-chain subsystem of Rigetti's Aspen-M-3 transmon processor. Our results indicate that, for the best circuit designs tested, the average performance at optimized angles and gate orderings increases with circuit depth (using more parameters), despite the presence of a high level of noise. We report performance significantly better than using a random guess oracle for circuits involving up to $\ensuremath{\simeq}5000$ two-qubit and $\ensuremath{\simeq}5000$ one-qubit native gates. We additionally discuss various takeaways of our results toward more effective utilization of current and future quantum processors for optimization.

DOI
10.1103/physrevapplied.22.044074

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Design and execution of quantum circuits using tens of superconducting qubits and thousands of gates for dense Ising optimization problems

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We develop a hardware-efficient ansatz for variational optimization, derived from existing ansatze in the literature, that parametrizes subsets of all interactions in the Cost Hamiltonian in each layer. We treat gate orderings as a variational parameter and observe that doing so can provide significant performance boosts in experiments. We carried out experimental runs of a compilation-optimized implementation of fully-connected Sherrington-Kirkpatrick Hamiltonians on a 50-qubit linear-chain subsystem of Rigetti’s Aspen-M-3 transmon processor. Our results indicate that, for the best circuit designs tested, the average performance at optimized angles and gate orderings increases with circuit depth (using more parameters), despite the presence of a high level of noise. We report performance significantly better than using a random guess oracle for circuits involving up to ≃ 5, 000 two-qubit and ≃ 5, 000 one-qubit native gates. We additionally discuss various takeaways of our results toward more effective utilization of current and future quantum processors for optimization.

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Journal of the Korean Physical Society•Mar 30, 2026•0 citations
We develop a hardware-efficient ansatz for variational optimization, derived from existing ansatzes in the literature, that parametrizes subsets of all interactions in the cost Hamiltonian in each layer. We treat gate orderings as a variational parameter and observe that doing so can provide significant performance boosts in experiments. We carried out experimental demonstration runs of a compilation-optimized implementation of fully connected Sherrington-Kirkpatrick Hamiltonians on a 50-qubit linear-chain subsystem of Rigetti's Aspen-M-3 transmon processor. Our results indicate that, for the best circuit designs tested, the average performance at optimized angles and gate orderings increases with circuit depth (using more parameters), despite the presence of a high level of noise. We report performance significantly better than using a random guess oracle for circuits involving up to \ensuremath≃5000\ensuremath{\simeq}5000\ensuremath≃5000 two-qubit and \ensuremath≃5000\ensuremath{\simeq}5000\ensuremath≃5000 one-qubit native gates. We additionally discuss various takeaways of our results toward more effective utilization of current and future quantum processors for optimization.
We develop a hardware-efficient ansatz for variational optimization, derived from existing ansatze in the literature, that parametrizes subsets of all interactions in the Cost Hamiltonian in each layer. We treat gate orderings as a variational parameter and observe that doing so can provide significant performance boosts in experiments. We carried out experimental runs of a compilation-optimized implementation of fully-connected Sherrington-Kirkpatrick Hamiltonians on a 50-qubit linear-chain subsystem of Rigetti’s Aspen-M-3 transmon processor. Our results indicate that, for the best circuit designs tested, the average performance at optimized angles and gate orderings increases with circuit depth (using more parameters), despite the presence of a high level of noise. We report performance significantly better than using a random guess oracle for circuits involving up to ≃ 5, 000 two-qubit and ≃ 5, 000 one-qubit native gates. We additionally discuss various takeaways of our results toward more effective utilization of current and future quantum processors for optimization.
Variational quantum algorithms involve training parametrized quantum circuits using a classical coprocessor. An important variational algorithm, designed for combinatorial optimization, is the quantum approximate optimization algorithm. Realization of this algorithm on any modern quantum processor requires either embedding a problem instance into a Hamiltonian or emulating the corresponding propagator by a gate sequence. For a vast range of problem instances this is impossible due to current circuit depth and hardware limitations. Hence we adapt the variational approach---using ion-native Hamiltonians---to create ansatz families that can prepare the ground states of more general problem Hamiltonians. We analytically determine symmetry protected classes that make certain problem instances inaccessible unless this symmetry is broken. We exhaustively search over six qubits and consider up to 20 circuit layers, demonstrating that symmetry can be broken to solve all problem instances of the Sherrington-Kirkpatrick Hamiltonian. Going further, we numerically demonstrate training convergence and levelwise improvement for up to 20 qubits. Specifically these findings widen the class problem instances which might be solved by ion based quantum processors. Generally these results serve as a test bed for quantum approximate optimization approaches based on system native Hamiltonians and symmetry protection.
Variational quantum algorithms have become a standard approach for solving a wide range of problems on near-term quantum computers. Identifying an appropriate ansatz configuration for variational algorithms, however, remains a challenging task, especially when taking into account restrictions imposed by real quantum platforms. This motivated the development of digital-analog quantum circuits, where sequences of quantum gates are alternated with natural Hamiltonian evolutions. A prominent example is the use of the controllable long-range Ising interaction induced in ion-based quantum computers. This interaction has recently been applied to develop an algorithm similar to the quantum approximate optimization algorithm (QAOA), but native to the ion hardware. The performance of this algorithm has demonstrated a strong dependence on the strengths of the individual ion-ion interactions, which serve as ansatz hyperparameters. In this work, we propose a heuristic for identifying a problem-specific ansatz configuration, which enhances the trainability of the ion native digital-analog circuit. The proposed approach is systematically applied to random instances of the Sherrington-Kirkpatrick Hamiltonian for up to 15 qubits, providing favorable cost landscapes. As the result, the developed approach identifies a well-trainable ion native ansatz, which requires a lower circuit depth to solve specific problems as compared to standard QAOA. This brings the algorithm one step closer to its large scale practical implementation.
Variational quantum circuits build the foundation for various classes of quantum algorithms. In a nutshell, the weights of a parametrized quantum circuit are varied until the empirical sampling distribution of the circuit is sufficiently close to a desired outcome. Numerical first-order methods are applied frequently to fit the parameters of the circuit, but most of the time, the circuit itself, that is, the actual composition of gates, is fixed. Methods for optimizing the circuit design jointly with the weights have been proposed, but empirical results are rather scarce. Here, we consider a simple evolutionary strategy that addresses the trade-off between finding appropriate circuit ar-chitectures and parameter tuning. We evaluate our method both via simulation and on actual quantum hardware. Our benchmark problems include the transverse field Ising Hamiltonian and the Sherrington-Kirkpatrick spin model. Despite the shortcomings of current noisy intermediate-scale quantum hardware, we find only a minor slowdown on actual quantum machines compared to simulations. Moreover, we investigate which mutation operations most significantly contribute to the optimization. The results provide intuition on how randomized search heuristics behave on actual quantum hardware and layout a path for further refinement of evolutionary quantum gate circuits.
The performance of the variational quantum eigensolver depends critically on the choice of ansatz. In this work, we experimentally evaluate the emergent-coupling-based ansatz (ECBA), a physically motivated variational ansatz for disordered systems. The ECBA is based on a renormalization (semi-)group approach to determine the dominant effective couplings, resulting in shallow circuits that capture the essential long-range entanglement structure while balancing local correlations. We implement the ECBA on superconducting quantum processors and benchmark it on disordered Heisenberg chain models. Using classically pre-optimized parameters and error mitigation techniques, we study systems of up to 30 qubits and observe an experimental relative energy accuracy of 96.41% for the largest system. Furthermore, we find that the ECBA can be efficiently embedded on hardware with two-dimensional square-lattice connectivity. We compare to commonly used hardware efficient ansätze and observe that the ECBA achieves significantly higher accuracy at a similar gate count.
Abstract Variational quantum algorithms offer a practical route to low-energy state preparation on near-term hardware, but performance depends strongly on ansatz design. We introduce the Heat-Exchange (HE) ansatz, a compact circuit family inspired by heat-bath algorithmic cooling and built from a tunable exchange interaction between a system qubit and an auxiliary bath qubit. On superconducting processors the exchange evolution UHE(θ)=exp⁡[−iθ(XX+YY)/2]U_{\textrm{HE}}(\theta )=\exp [-i\theta (XX+YY)/2]UHE​(θ)=exp[−iθ(XX+YY)/2] U HE ( θ ) = exp [ - i θ ( X X + Y Y ) / 2 ] is implemented digitally as a shallow compiled gate sequence, requiring no mid-circuit reset, measurement, or feedback. We benchmark HE on two complementary tasks: weighted MaxCut on random complete graphs (noise-free simulation and hardware runs on with readout error mitigation) and a one-dimensional Heisenberg chain with a pinned site within a dissipative-VQE-style workflow (noise-free simulation). HE increases the probability of sampling the best cut compared with a hardware-efficient baseline and QAOA under limited evaluation budgets and yields ground-state energies with sub-percent relative error for the impurity chain. These results highlight exchange-driven cooling blocks as compact, parameter-efficient, hardware-compatible primitives for near-term variational workflows.