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arXiv:2307.04355 · Advanced Electronic Materials

Large‐Scale On‐Chip Integration of Gate‐Voltage Addressable Hybrid Superconductor–Semiconductor Quantum Wells Field Effect Nano‐Switch Arrays

Kaveh Delfanazari, Jiahui Li, Pengcheng Ma, Reuben K. Puddy, Teng Yi, Yusheng Xiong, Ian A. Farrer, Sachio Komori, Jason W. A. Robinson, D. A. Ritchie, Michael Joseph Kelly, Hannah Jane Joyce, Charles G. Smith

Published Oct 22, 2023• 15 citations
arXivHTMLPDF

Abstract

Abstract Stable, reproducible, scalable, addressable, and controllable hybrid superconductor–semiconductor (S–Sm) junctions and switches are key circuit elements and building blocks of gate‐based quantum processors. The electrostatic field effect produced by the split gate voltages facilitates the realization of nano‐switches that can control the conductance or current in the hybrid S–Sm circuits based on 2D semiconducting electron systems. Here, a novel realization of large‐scale scalable, and gate voltage controllable hybrid field effect quantum chips is experimentally demonstrated. Each chip contains arrays of split gate field effect hybrid junctions, that work as conductance switches, and are made from In0.75Ga0.25As quantum wells integrated with Nb superconducting electronic circuits. Each hybrid junction in the chip can be controlled and addressed through its corresponding source–drain and two global split gate contact pads that allow switching between their (super)conducting and insulating states. A total of 18 quantum chips are fabricated with 144 field effect hybrid Nb‐ In0.75Ga0.25As 2DEG‐Nb quantum wires and the electrical response, switching voltage (on/off) statistics, quantum yield, and reproducibility of several devices at cryogenic temperatures are investigated. The proposed integrated quantum device architecture allows control of individual junctions in a large array on a chip useful for emerging cryogenic quantum technologies.

DOI
10.1002/aelm.202300453

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Abstract Stable, reproducible, scalable, addressable, and controllable hybrid superconductor–semiconductor (S–Sm) junctions and switches are key circuit elements and building blocks of gate‐based quantum processors. The electrostatic field effect produced by the split gate voltages facilitates the realization of nano‐switches that can control the conductance or current in the hybrid S–Sm circuits based on 2D semiconducting electron systems. Here, a novel realization of large‐scale scalable, and gate voltage controllable hybrid field effect quantum chips is experimentally demonstrated. Each chip contains arrays of split gate field effect hybrid junctions, that work as conductance switches, and are made from In0.75Ga0.25As quantum wells integrated with Nb superconducting electronic circuits. Each hybrid junction in the chip can be controlled and addressed through its corresponding source–drain and two global split gate contact pads that allow switching between their (super)conducting and insulating states. A total of 18 quantum chips are fabricated with 144 field effect hybrid Nb‐ In0.75Ga0.25As 2DEG‐Nb quantum wires and the electrical response, switching voltage (on/off) statistics, quantum yield, and reproducibility of several devices at cryogenic temperatures are investigated. The proposed integrated quantum device architecture allows control of individual junctions in a large array on a chip useful for emerging cryogenic quantum technologies.
In this paper, we experimentally demonstrate a hybrid superconducting-semiconducting circuit consisting of eight planar and ballistic Nb-In0.75Ga0.25As-Nb Josephson junctions. E-beam lithography was used to fabricate the Josephson junctions on an InGaAs chip. In contrast to our previous studies on long junctions that were fabricated by photolithography, in this study, we observe the induced superconductivity in an In0.75Ga0.25As quantum well at higher temperatures, between T = 0.3 and 1 K (3He cryostat temperature range). The induced superconducting gap of Δind= 0.65 meV was measured at lowest base temperature T = 300 mK. The effect of temperature and magnetic fields B on the induced superconductivity are presented. Our results suggest that our In0.75Ga0.25As heterostructure is a promising scalable material system for quantum processing and computing applications.
A quantum point contact (QPC)—a constriction in a semiconducting two-dimensional electron system with a quantized conductance—is a building block of novel spintronic and topological electronic circuits. QPCs can also be used as readout electronics, charge sensors, or switches in quantum nanocircuits. A short and impurity-free constriction with superconducting contacts is a Cooper-pair QPC analogue known as a superconducting quantum point contact (SQPC). The technological development of such quantum devices has been prolonged due to the challenges of maintaining their geometrical requirement and near-unity superconductor-semiconductor interface transparency. Here, we develop advanced nanofabrication, material and device engineering techniques and report on an innovative realization of nanoscale hybrid SQPC arrays with split gate technology in semiconducting 2D electron systems. We exploit the special gate tunability of the quantum wells, and demonstrate the first experimental observation of conductance quantization in hybrid InGaAs-Nb SQPCs. We observe reproducible quantized conductance at zero magnetic fields in multiple quantum nanodevices fabricated in a single chip and systematically investigate the quantum transport of SQPCs at low and high magnetic fields for their potential applications in quantum metrology, for extremely accurate voltage standards, and fault-tolerant quantum technologies. Published by the American Physical Society 2024
In this paper, we experimentally demonstrate a hybrid superconducting-semiconducting (S-Sm) circuit consisting of eight planar and ballistic Nb-In0.75Ga0.25As-Nb Josephson junctions. E-beam lithography was used to fabricate the Josephson junctions on an InGaAs chip. In contrast to our previous studies on long junctions that were fabricated by photolithography, in this study, we observe the induced superconductivity in an In0.75Ga0.25As quantum well at higher temperatures, between T= 0.3 and 1.4 K (3He cryostat temperature range). The induced superconducting gap of & #x0394;ind= 0.65 meV was measured at lowest base temperature T= 300 mK. The effect of temperature and magnetic fields B on the induced superconductivity are presented. Our results suggest that our In0.75Ga0.25As heterojunctions is a promising scalable material system for quantum processing and computing applications.
Abstract Superconducting circuits based on hybrid InAs Josephson Junctions (JJs) play a starring role in the design of fast and ultra‐low power consumption solid‐state quantum electronics and exploring novel physical phenomena. Conventionally, 3D substrates, 2D quantum wells (QWs), and 1D nanowires (NWs) made of InAs are employed to create superconducting circuits with hybrid JJs. Each platform has its advantages and disadvantages. Here, the InAs‐on‐insulator (InAsOI) is proposed as a groundbreaking platform for developing superconducting electronics. An epilayer of semiconducting InAs with different electron densities is grown onto an InAlAs metamorphic buffer, efficiently used as a cryogenic insulator to decouple adjacent devices electrically. JJs with various lengths and widths are fabricated employing Al as a superconductor and InAs with different electron densities. A switching current density of 7.3 µA µm−1, a critical voltage of 50‐to‐80 µV, and a critical temperature equal to that of the superconductor used are achieved. For all the JJs, the switching current follows a Fraunhofer‐like pattern with the out‐of‐plane magnetic field. These achievements enable the use of InAsOI to design and fabricate surface‐exposed Josephson Field Effect Transistors with high critical current densities and superior gating properties.
Quantum point contact or QPC -- a constriction in a semiconducting two-dimensional (2D) electron system with a quantized conductance -- has been found as the building block of novel spintronic, and topological electronic circuits. They can also be used as readout electronic, charge sensor or switch in quantum nanocircuits. A short and impurity-free constriction with superconducting contacts is a Cooper pairs QPC analogue known as superconducting quantum point contact (SQPC). The technological development of such quantum devices has been prolonged due to the challenges of maintaining their geometrical requirement and near-unity superconductor-semiconductor interface transparency. Here, we develop advanced nanofabrication, material and device engineering techniques and report on an innovative realisation of nanoscale SQPC arrays with split gate technology in semiconducting 2D electron systems, exploiting the special gate tunability of the quantum wells, and report the first experimental observation of conductance quantization in hybrid InGaAs-Nb SQPCs. We observe reproducible quantized conductance at zero magnetic fields in multiple quantum nanodevices fabricated in a single chip and systematically investigate the quantum transport of SQPCs at low and high magnetic fields for their potential applications in quantum metrology, for extremely accurate voltage standards, and fault-tolerant quantum technologies.
Scalability in the fabrication and operation of quantum computers is key to move beyond the NISQ era. So far, superconducting transmon qubits based on aluminum Josephson tunnel junctions have demonstrated the most advanced results, though this technology is difficult to implement with large-scale facilities. An alternative "gatemon" qubit has recently appeared, which uses hybrid superconducting/semiconducting (S/Sm) devices as gate-tuned Josephson junctions. Current implementations of these use nanowires however, of which the large-scale fabrication has not yet matured either. A scalable gatemon design could be made with CMOS Josephson Field-Effect Transistors as tunable weak link, where an ideal device has leads with a large superconducting gap that contact a short channel through high-transparency interfaces. High transparency, or low contact resistance, is achieved in the microelectronics industry with silicides, of which some turn out to be superconducting. The first part of the experimental work in this thesis covers material studies on two such materials: V3Si\text{V}_3\text{Si}V3​Si and PtSi, which are interesting for their high TcT_\text{c}Tc​, and mature integration, respectively. The second part covers experimental results on 50 nm gate length PtSi transistors, where the transparency of the S/Sm interfaces is modulated by the gate voltage. At low voltages, the transport shows no conductance at low energy, and well-defined features at the superconducting gap. The barrier height at the S/Sm interface is reduced by increasing the gate voltage, until a zero-bias peak appears around zero drain voltage, which reveals the appearance of an Andreev current. The successful gate modulation of Andreev current in a silicon-based transistor represents a step towards fully CMOS-integrated superconducting quantum computers.