Lookup-table decoding is fast and distance preserving, making it attractive for near-term quantum computer architectures with small-distance quantum error-correcting codes. In this work, we develop several optimization tools that can potentially reduce the space and time overhead required for flag fault-tolerant quantum error correction (FTQEC) with lookup-table decoding on Calderbank-Shor-Steane (CSS) codes. Our techniques include the compact lookup-table construction, the meet-in-the-middle technique, the adaptive time decoding for flag FTQEC, the classical processing technique for flag information, and the separate X - and Z -counting technique. We evaluate the performance of our tools using numerical simulation of hexagonal color codes of distances 3, 5, 7, and 9 under circuit-level noise. Combining all tools can result in an increase of more than an order of magnitude in the pseudothreshold for the hexagonal color code of distance 9, from (1.34±0.01)×10−4 to (1.43±0.07)×10−3 . Published by the American Physical Society 2024
Lookup-table decoding is fast and distance preserving, making it attractive for near-term quantum computer architectures with small-distance quantum error-correcting codes. In this work, we develop several optimization tools that can potentially reduce the space and time overhead required for flag fault-tolerant quantum error correction (FTQEC) with lookup-table decoding on Calderbank-Shor-Steane (CSS) codes. Our techniques include the compact lookup-table construction, the meet-in-the-middle technique, the adaptive time decoding for flag FTQEC, the classical processing technique for flag information, and the separate X - and Z -counting technique. We evaluate the performance of our tools using numerical simulation of hexagonal color codes of distances 3, 5, 7, and 9 under circuit-level noise. Combining all tools can result in an increase of more than an order of magnitude in the pseudothreshold for the hexagonal color code of distance 9, from (1.34±0.01)×10−4 to (1.43±0.07)×10−3 . Published by the American Physical Society 2024
Fault-tolerant (FT) computation by using quantum error correction (QEC) is essential for realizing large-scale quantum algorithms. Devices are expected to have enough qubits to demonstrate aspects of fault tolerance in the near future. However, these near-term quantum processors will only contain a small amount of noisy qubits and allow limited qubit connectivity. Fault-tolerant schemes that not only have low qubit overhead but also comply with geometrical interaction constraints are therefore necessary. In this work, we combine flag fault tolerance with quantum circuit mapping, to enable an efficient flag-bridge approach to implement FT QEC on near-term devices. We further show an example of performing the Steane code error correction on two current superconducting processors and numerically analyze their performance with circuit level noise. The simulation results show that the QEC circuits that measure more stabilizers in parallel have lower logical error rates. We also observe that the Steane code can outperform the distance-3 surface code using flag-bridge error correction. In addition, we foresee potential applications of the flag-bridge approach such as FT computation using lattice surgery and code deformation techniques.
Color codes are promising quantum error-correction (QEC) codes because they have an advantage over surface codes in that all Clifford gates can be implemented transversally. However, the thresholds of color codes under circuit-level noise are relatively low, mainly because measurements of their high-weight stabilizer generators cause an increase in the circuit depth and, thus, substantial errors are introduced. This makes color codes not the best candidate for fault-tolerant quantum computing. Here, we propose a method to suppress the impact of such errors by optimizing weights of decoders using conditional error probabilities conditioned on the measurement outcomes of flag qubits. In numerical simulations, we improve the threshold of the (4.8.8) color code under circuit-level noise from 0.14% to around 0.27%, which is calculated by using an integer programming decoder. Furthermore, in the (6.6.6) color code, we achieve a circuit-level threshold of around 0.36%, which is almost the same value as the highest value in the previous studies employing the same noise model. In both cases, the effective code distance is also improved compared to a conventional method that uses a single ancilla qubit for each stabilizer measurement. Thereby, the achieved logical error rates at low physical error rates are almost one order of magnitude lower than those of the conventional method with the same code distance. Even when compared to the single-ancilla method with a higher code distance, considering the increased number of qubits used in our method, we achieve lower logical error rates in most cases. This method can also be applied to other weight-based decoders, making the color codes more promising as candidates for the experimental implementation of QEC. Furthermore, one can utilize this approach to improve a threshold of wider classes of QEC codes, such as high-rate quantum low-density parity-check codes. Published by the American Physical Society 2024
Fault-tolerant (FT) preparation of diverse logical stabilizer states in quantum error-correcting (QEC) codes is essential for FT computation. Existing constructions of these FT circuits are often constrained by classical computational resources or result in unnecessarily large quantum circuits. This work introduces a modular construction for FT preparation circuits in CSS codes of arbitrary distance, yielding significantly more resource-efficient circuits than previous approaches, especially for the largest codes studied. The key insight is that in bipartite CX circuits used to prepare CSS states, X errors propagate in one direction across the qubit partition, while Z errors propagate in the opposite direction. By appending X-detecting flag gadgets to the first partition and Z-detecting flag gadgets to the second, the circuit becomes FT. To manage the associated overhead, we propose an algorithm that discovers optimal (or near-optimal) flag gadgets at any distance. These gadgets are reusable across different QEC codes and FT subroutines, such as flag-based QEC. We estimate the logical state preparation error using subset-sampling Monte Carlo simulations at the circuit level, combined with approximate maximum-likelihood look-up table decoding. On Quantinuum's H2-1 device, preparation of the ∣0ˉ⟩ state in the [[23,1,7]] Golay code achieves a logical SPAM error rate of 3.3−2.4+8.6×10−4 with an acceptance rate of 47.23(86)%. This surpasses (within 95% confidence intervals) the minimum SPAM error rate of 6.0(1.6)×10−4 for a physical ∣0⟩, as well as the best previously demonstrated logical state preparations.
Flag-style fault-tolerance has become a linchpin in the realization of small fault-tolerant quantum-error correction experiments. The flag protocol's utility hinges on low qubit over-head, which is typically much smaller than in other approaches. However, as in most fault-tolerance protocols, the advantages of flag-style error correction come with a tradeoff: fault tolerance can be guaranteed, but such protocols involve high-depth circuits, due to the need for repeated stabilizer measurements. Here, we demonstrate that a dynamic choice of stabilizer measurements, based on past syndromes, and the utilization of elements from the full stabilizer group, leads to flag protocols with lower-depth syndrome-extraction circuits for the [[5], [1], [3]] code, as well as for the Steane code when compared to the standard methods in flag fault tolerance. We methodically prove that our new protocols yield fault-tolerant lookup tables, and demonstrate them with a pseudothreshold simulation, showcasing large improvements for all protocols when compared to previously-established methods. This work opens the dialogue on exploiting the properties of the full stabilizer group for reducing circuit overhead in fault-tolerant quantum-error correction.
Quantum computation holds the promise of solving certain complex problems exponentially faster than classical computers. However, the high prevalent noise in current quantum devices impedes the accurate execution of even basic algorithms. This can be remedied by protecting quantum information with a quantum error-correcting code, where the logical information of an algorithmic qubit is spread across multiple physical qubits. Individual quantum errors are then located and corrected by the fault-tolerant measurement of multi-qubit stabilizer operators (parity checks). Unfortunately, error correction and fault tolerance both impose large demands on the qubit overhead: hundreds to thousands of physical qubits per logical qubit.
We reduce the spacetime cost of fault tolerance by redesigning key building blocks of an error-corrected quantum computer. First, we develop a combinatorial proof with flag fault tolerance that exponentially reduces the extra qubits needed to measure a stabilizer of any size, while tolerating one fault. We leverage these proofs to then design state preparation circuits for the Steane and Golay codes with 100% yield. Next, we improve error correction on a planar layout by showing that a distance-four code encoding six logical qubits protects information as well as the distance-five surface code, using one-tenth as many physical qubits. Finally, we optimize the time overhead of logical gates in surface code quantum computers by protecting measurement results with a classical code, cutting computation time by a factor of two to six. Our hardware-agnostic optimizations of fault tolerance overheads thus suggest new routes to advance the timeline of error-free quantum computing.
Given that quantum error correction processes are unreliable, an efficient error syndrome extraction circuit should use fewer ancillary qubits, quantum gates, and measurements, while maintaining low circuit depth, to minimizing the circuit area, roughly defined as the product of circuit depth and the number of physical qubits. We propose to design parallel flagged syndrome extraction with shared flag qubits for quantum stabilizer codes. Versatile parallelization techniques are employed to minimize the required circuit area, thereby improving the error threshold and overall performance. Specifically, measurement outcomes across multiple rounds of syndrome extraction are integrated into a lookup table decoder, enabling parallelization of multiple stabilizer measurements with shared flag qubits. Additionally, we introduce an adaptive technique to reduce the overhead from excessive syndrome extraction. We present flag-sharing and fully parallel schemes for the[[17,1,5]],[[19,1,5]]Calderbank-Shor-Steane (CSS) codes and the[[5,1,3]]non-CSS code, where the[[5,1,3]]implementation achieves the minimum known circuit area. Numerical simulations have demonstrated improved pseudo-thresholds for these codes by up to an order of magnitude compared to previous schemes in the literature.