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arXiv:2303.01427 · npj Quantum Information

Experimental error suppression in Cross-Resonance gates via multi-derivative pulse shaping

Boxi Li, Tommaso Calarco, Felix Motzoi

Published Jul 2, 2024• 23 citations
arXivHTMLPDF

Abstract

Abstract While quantum circuits are reaching impressive widths in the hundreds of qubits, their depths have not been able to keep pace. In particular, cloud computing gates on multi-qubit, fixed-frequency superconducting chips continue to hover around the 1% error range, contrasting with the progress seen on carefully designed two-qubit chips, where error rates have been pushed towards 0.1%. Despite the strong impetus and a plethora of research, experimental demonstration of error suppression on these multi-qubit devices remains challenging, primarily due to the wide distribution of qubit parameters and the demanding calibration process required for advanced control methods. Here, we achieve this goal, using a simple control method based on multi-derivative, multi-constraint pulse shaping, which acts simultaneously against multiple error sources. Our approach establishes a two to fourfold improvement on the default calibration scheme, demonstrated on four qubits on the IBM Quantum Platform with limited and intermittent access, enabling these large-scale fixed-frequency systems to fully take advantage of their superior coherence times. The achieved CNOT fidelities of 99.7(1)% on those publically available qubits come from both coherent control error suppression and accelerated gate time.

DOI
10.1038/s41534-024-00863-4

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Abstract While quantum circuits are reaching impressive widths in the hundreds of qubits, their depths have not been able to keep pace. In particular, cloud computing gates on multi-qubit, fixed-frequency superconducting chips continue to hover around the 1% error range, contrasting with the progress seen on carefully designed two-qubit chips, where error rates have been pushed towards 0.1%. Despite the strong impetus and a plethora of research, experimental demonstration of error suppression on these multi-qubit devices remains challenging, primarily due to the wide distribution of qubit parameters and the demanding calibration process required for advanced control methods. Here, we achieve this goal, using a simple control method based on multi-derivative, multi-constraint pulse shaping, which acts simultaneously against multiple error sources. Our approach establishes a two to fourfold improvement on the default calibration scheme, demonstrated on four qubits on the IBM Quantum Platform with limited and intermittent access, enabling these large-scale fixed-frequency systems to fully take advantage of their superior coherence times. The achieved CNOT fidelities of 99.7(1)% on those publically available qubits come from both coherent control error suppression and accelerated gate time.
Efforts to scale-up quantum computation have reached a point where the principal limiting factor is not the number of qubits, but the entangling gate infidelity. However, the highly detailed system characterization required to understand the underlying error sources is an arduous process and impractical with increasing chip size. Open-loop optimal control techniques allow for the improvement of gates but are limited by the models they are based on. To rectify the situation, we provide an integrated open-source tool set for control, calibration, and characterization (C3{\mathbb{C}}^{3}C3), capable of open-loop pulse optimization, model-free calibration, model fitting, and refinement. We present a methodology to combine these tools to find a quantitatively accurate system model, high-fidelity gates, and an approximate error budget, all based on a high-performance, feature-rich simulator. We illustrate our methods using simulated fixed-frequency superconducting qubits for which we learn model parameters with less than $1\mathrm{%}$ error and derive a coherence-limited cross-resonance gate that achieves $99.6\mathrm{%}$ fidelity without the need for calibration.
High fidelity quantum operations are key to enabling fault-tolerant quantum computation. Superconducting quantum processors have demonstrated high-fidelity operations, but on larger devices there is commonly a broad distribution of qualities, with the low-performing tail affecting near-term performance and applications. Here we present an error budgeting procedure for the native two-qubit operation on a 32-qubit superconducting-qubit-based quantum computer, the OQC Toshiko gen-1 system. We estimate the prevalence of different forms of error such as coherent error and control qubit leakage, then apply error suppression strategies based on the most significant sources of error, making use of pulse-shaping and additional compensating gates. These techniques require no additional hardware overhead and little additional calibration, making them suitable for routine adoption. An average reduction of 3.7x in error rate for two qubit operations is shown across a chain of 16 qubits, with the median error rate improving from 4.6%\%% to 1.2%\%% as measured by interleaved randomized benchmarking. The largest improvements are seen on previously under-performing qubit pairs, demonstrating the importance of practical error suppression in reducing the low-performing tail of gate qualities and achieving consistently good performance across a device.
We describe an experimental effort designing and deploying error-robust single-qubit operations using a cloud-based quantum computer and analog-layer programming access. We design numerically optimized pulses that implement target operations and exhibit robustness to various error processes including dephasing noise, instabilities in control amplitudes, and crosstalk. Pulse optimization is performed using a flexible optimization package incorporating a device model and physically relevant constraints (e.g., bandwidth limits on the transmission lines of the dilution refrigerator housing IBM Quantum hardware). We present techniques for conversion and calibration of physical Hamiltonian definitions to pulse waveforms programmed via Qiskit Pulse and compare performance against hardware default derivative removal by adiabatic gate (DRAG) pulses on a five-qubit device. Experimental measurements reveal default DRAG pulses exhibit coherent errors an order of magnitude larger than tabulated randomized-benchmarking measurements; solutions designed to be robust against these errors outperform hardware-default pulses for all qubits across multiple metrics. Experimental measurements demonstrate performance enhancements up to: about a 101010 times single-qubit gate coherent-error reduction; about a 555 times average coherent-error reduction across a five-qubit system; about a 101010 times increase in calibration window to one week of valid pulse calibration; about a 121212 times reduction gate-error variability across qubits and over time; and up to about a 999 times reduction in single-qubit gate error (including crosstalk) in the presence of fully parallelized operations. Randomized benchmarking reveals error rates for Clifford gates constructed from optimized pulses consistent with tabulated T1{T}_{1}T1​ limits, and demonstrates a narrowing of the distribution of outcomes over randomizations associated with suppression of coherent errors.
Single-qubit gates on superconducting quantum processors are typically implemented using microwave pulses applied through dedicated control lines. However, these microwave pulses may also drive other qubits due to crosstalk arising from capacitive coupling and wavefunction overlap in systems with closely spaced transition frequencies. Crosstalk and frequency crowding increase errors during simultaneous single-qubit operations relative to isolated gates, thus forming a major bottleneck for scaling superconducting quantum processors. In this work, we combine model-based qubit frequency optimization with pulse shaping to demonstrate crosstalk error mitigation in single-qubit gates on a 49-qubit superconducting quantum processor. We introduce and experimentally verify an analytical model of simultaneous single-qubit gate error caused by microwave crosstalk that depends on a given pulse shape. By employing a model-based optimization strategy of qubit frequencies, we minimize the crosstalk-induced error across the processor and achieve a mean simultaneous single-qubit gate fidelity of 99.96% for a 16-ns gate duration, approaching the mean individual gate fidelity. To further reduce the simultaneous error and required qubit frequency bandwidth on high-crosstalk qubit pairs, we introduce a crosstalk transition suppression (CTS) pulse shaping technique that minimizes the spectral energy around transitions inducing leakage and crosstalk errors. Finally, we combine CTS with model-based frequency optimization across the device and experimentally show a systematic reduction in the required qubit frequency bandwidth for high-fidelity simultaneous gates, supported by simulations of systems with up to 1000 qubits. By alleviating constraints on qubit frequency bandwidth for parallel single-qubit operations, this work represents an important step for scaling towards larger quantum processors.
Achieving fast and high-fidelity qubit operations is crucial for unlocking the potential of quantum computers. In particular, reaching low gate errors in two-qubit gates has been a long-standing challenge in the field of superconducting qubits due to their typically long duration relative to coherence times. To realize fast gates, we use the hybridization between fixed-frequency superconducting qubits with a strongly interacting coupler mode that is tunable in frequency. To reduce population leakage during required adiabatic passages through avoided level crossings, we employ a sensitivity-adaptive closed-loop optimization method to design complex pulse shapes. We compare the performance of Gaussian-square, Fourier-series, and piecewise-constant-slope pulse parametrizations and are able to reach 99.9% controlled- Z -gate fidelity using a 64-ns-long Fourier-series pulse defined by only seven parameters. These high-fidelity values are achieved by analyzing the optimized pulse shapes to identify and systematically mitigate signal-line distortions in the experiment. To improve the convergence speed of the optimization, we implement an adaptive cost function, which continuously maximizes the sensitivity. The demonstrated method can be used for tune-up and recalibration of superconducting quantum processors.
High-quality two-qubit gate operations are crucial for scalable quantum information processing. Often, the gate fidelity is compromised when the system becomes more integrated. Therefore, a low-error-rate, easy-to-scale two-qubit gate scheme is highly desirable. Here, we experimentally demonstrate a new two-qubit gate scheme that exploits fixed-frequency qubits and a tunable coupler in a superconducting quantum circuit. The scheme requires less control lines, reduces cross talk effect, and simplifies calibration procedures, yet produces a controlled-Z gate in 30 ns with a high fidelity of 99.5%, derived from the interleaved randomized benchmarking method. Error analysis shows that gate errors are mostly coherence limited. Our demonstration paves the way for large-scale implementation of high-fidelity quantum operations.