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arXiv:2302.02192 · Quantum

Relaxing Hardware Requirements for Surface Code Circuits using Time-dynamics

Matt McEwen, Dave Bacon, Craig Gidney

Published Nov 7, 2023• 78 citations
arXivHTMLPDF

Abstract

The typical time-independent view of quantum error correction (QEC) codes hides significant freedom in the decomposition into circuits that are executable on hardware. Using the concept of detecting regions, we design time-dynamic QEC circuits directly instead of designing static QEC codes to decompose into circuits. In particular, we improve on the standard circuit constructions for the surface code, presenting new circuits that can embed on a hexagonal grid instead of a square grid, that can use ISWAP gates instead of CNOT or CZ gates, that can exchange qubit data and measure roles, and that move logical patches around the physical qubit grid while executing. All these constructions use no additional entangling gate layers and display essentially the same logical performance, having teraquop footprints within 25% of the standard surface code circuit. We expect these circuits to be of great interest to quantum hardware engineers, because they achieve essentially the same logical performance as standard surface code circuits while relaxing demands on hardware.

DOI
10.22331/q-2023-11-07-1172

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The typical time-independent view of quantum error correction (QEC) codes hides significant freedom in the decomposition into circuits that are executable on hardware. Using the concept of detecting regions, we design time-dynamic QEC circuits directly instead of designing static QEC codes to decompose into circuits. In particular, we improve on the standard circuit constructions for the surface code, presenting new circuits that can embed on a hexagonal grid instead of a square grid, that can use ISWAP gates instead of CNOT or CZ gates, that can exchange qubit data and measure roles, and that move logical patches around the physical qubit grid while executing. All these constructions use no additional entangling gate layers and display essentially the same logical performance, having teraquop footprints within 25% of the standard surface code circuit. We expect these circuits to be of great interest to quantum hardware engineers, because they achieve essentially the same logical performance as standard surface code circuits while relaxing demands on hardware.
A remarkable characteristic of quantum computing is the potential for reliable computation despite faulty qubits. This can be achieved through quantum error correction, which is typically implemented by repeatedly applying static syndrome checks, permitting correction of logical information. Recently, the development of time-dynamic approaches to error correction has uncovered new codes and new code implementations. In this work, we experimentally demonstrate three time-dynamic implementations of the surface code, each offering a unique solution to hardware design challenges and introducing flexibility in surface code realization. First, we embed the surface code on a hexagonal lattice, reducing the necessary couplings per qubit from four to three. Second, we walk a surface code, swapping the role of data and measure qubits each round, achieving error correction with built-in removal of accumulated non-computational errors. Finally, we realize the surface code using iSWAP gates instead of the traditional CNOT, extending the set of viable gates for error correction without additional overhead. We measure the error suppression factor when scaling from distance-3 to distance-5 codes of Λ35,hex=2.15(2)Λ_{35,\text{hex}} = 2.15(2)Λ35,hex​=2.15(2), Λ35,walk=1.69(6)Λ_{35,\text{walk}} = 1.69(6)Λ35,walk​=1.69(6), and Λ35,iSWAP=1.56(2)Λ_{35,\text{iSWAP}} = 1.56(2)Λ35,iSWAP​=1.56(2), achieving state-of-the-art error suppression for each. With detailed error budgeting, we explore their performance trade-offs and implications for hardware design. This work demonstrates that dynamic circuit approaches satisfy the demands for fault-tolerance and opens new alternative avenues for scalable hardware design.
Quantum error correction (QEC) codes are traditionally defined and searched for without specifying the manner in which its syndrome extraction circuits are executed using elementary gates and measurements. We show how morphing circuits introduced in Refs. [1-3] provide a way of optimising syndrome extraction circuits and codes directly in terms of connectivity, choice of two-qubit gate (ISWAP versus CNOT) and number of physical qubits. We discuss morphing circuits in code optimisation among Abelian two-block group algebra (2BGA) codes, handling boundaries for 2D codes, codes with single-shot properties, and improving performance in stability experiments against measurement and reset errors. We show that alternating syndrome extraction circuits - executed with alternating time-reversed rounds - can be viewed as a two-round morphing circuit whose fault-tolerant properties are computationally much easier to examine than non-alternating syndrome extraction circuits. Our methods find new codes and syndrome extraction circuits of practical interest, including Abelian 2BGA morphing circuits with better code parameters and connectivity than existing circuits. [1] Matt McEwen, Dave Bacon, and Craig Gidney. Relaxing hardware requirements for surface code circuits using time-dynamics. Quantum, 7:1172, 2023. [2] Craig Gidney and Cody Jones. New circuits and an open source decoder for the color code, 2023. [3] Mackenzie H. Shaw and Barbara M. Terhal. Lowering connectivity requirements for bivariate bicycle codes using morphing circuits.
A remarkable characteristic of quantum computing is the potential for reliable computation despite faulty qubits. This can be achieved through quantum error correction, which is typically implemented by repeatedly applying static syndrome checks, permitting correction of logical information. Recently, the development of time-dynamic approaches to error correction has enabled different codes and implementations that do not rely on static syndrome measurements. Here we experimentally demonstrate three time-dynamic implementations of the surface code, each offering a distinct solution to hardware design challenges faced by surface code realizations. First, we embed the surface code on a hexagonal lattice, reducing the necessary couplings per qubit from four to three. Second, we walk a surface code, swapping the role of data and measure qubits each round, achieving error correction with built-in removal of accumulated non-computational errors. Finally, we realize the surface code using iSWAP gates instead of the traditional CNOT, extending the set of viable gates for error correction without additional overhead. We measure the error suppression factor when scaling from distance-3 to distance-5 codes of Λ35,hex = 2.15(2), Λ35,walk = 1.69(6) and Λ35,iSWAP = 1.56(2), achieving state-of-the-art error suppression for each. Our work demonstrates that dynamic circuit approaches meet the demands for fault tolerance and enable alternative strategies for scalable hardware design. Typical quantum error correcting codes assign fixed roles to the underlying physical qubits. Now the performance benefits of alternative, dynamic error correction schemes have been demonstrated on a superconducting quantum processor.
Quantum error correction (QEC) promises to exponentially suppress qubit noise, but typically assumes spatially-uniform and temporally-constant noise rates. However, real quantum hardware exhibits variation in noise levels over time, which will be amplified by QEC if not addressed. To mitigate this drift in error rates, we leverage transient information readily available in surface code quantum error correction to predict logical error rates (LER) in real time. We infer a prediction model by sampling physical error rates from real hardware, and mapping detector fire rate (DFR), or parity of stabilizer measurements across QEC rounds, to LER. This allows for on-the-fly LER predictions without the typical characterization overhead required to determine LER. This method can easily be extended to other stabilizer codes. Importantly, we observe that this prediction should be accurate yet conservative (i.e. give an upper estimate) to enable appropriately fast responses to real-time physical error changes. That is, responses should be executed marginally ahead of time to allow for their execution to complete, and minimize time spent (ideally none) above intolerable error rates. More importantly, we pair this predictor with a scheme which remaps drifted logical qubits to fresh tiles in a patch-based architecture while their original tiles are recalibrated. Our results demonstrate DFR-based prediction to be an effective LER predictor, and remapping as a spatially efficient and timely mitigation response for small code distances, both of which are significant steps in furthering practical QEC.
Quantum error correction (QEC) codes can correct twice as many erasure errors as Pauli errors. Because of this scaling advantage, there is significant interest in developing qubits whose dominant error channel can be converted into erasures via mid-circuit erasure checks. However, such erasure checks come with hardware overhead in practice. End-of-the-line three-state readout, in which one simultaneously measures a qubit's erasure status and computational state, is an alternative to mid-circuit erasure checks that is generally simpler to implement. In this work, we systematically study the conditions required to enable erasure performance---the doubled error-correction capacity---in the surface code with and without mid-circuit erasure checks. We introduce the moonwalking surface code, the time-reversal of the walking surface code, as a zero-overhead circuit with superior handling of leakage and erasure. Specifically, we show that it enables erasure-like logical error rate scaling when combined with three-state measurement if leaked qubits cause two-qubit gates to be skipped and an appropriate decoder is used. Our decoder, based on a branch-and-bound algorithm, specifically incorporates the noise structure of the skip-gate leaked-qubit effect.
Quantum error correction (QEC) protects quantum systems against inevitable noises and control inaccuracies, providing a pathway toward fault-tolerant (FT) quantum computation. Stabilizer codes, including surface code and color code, have long been the focus of research and have seen significant experimental progress in recent years. Recently proposed time-dynamical QEC, including Floquet codes and generalized time-dynamical code implementations, opens up new opportunities for FT quantum computation. By employing a periodic schedule of low-weight parity checks, Floquet codes can generate additional dynamical logical qubits, offering enhanced error correction capabilities and, potentially, higher code performance. Here, we experimentally implement the Floquet-Bacon-Shor code on a superconducting quantum processor. We encode a dynamical logical qubit within a 3×3 lattice of data qubits alongside a conventional static logical qubit. We demonstrate FT encoding and measurement of the two-qubit logical states and stabilize these states using repeated error detection. We showcase universal single-qubit logical gates on the dynamical qubit. Furthermore, by implementing a logical controlled-not (cnot) gate, we entangle the dynamical and static logical qubits, generating an error-detected logical Bell state with a fidelity of 75.9%. Our results highlight the potential of Floquet codes for resource-efficient FT quantum computation.