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arXiv:2212.13751 · Quantum Science and Technology

Quantum chip design optimization and automation in superconducting coupler architecture

Fei-Yu Li, Li-Jing Jin

Published Jul 19, 2023• 4 citations
arXivHTMLPDF

Abstract

Abstract Superconducting coupler architecture demonstrates great potential for scalable and high-performance quantum processors, yet how to design efficiently and automatically ‘Qubit–Coupler–Qubit (QCQ)’ of high performance from the layout perspective remains obscure. In this work, this issue is studied for the first time resulting in three key findings. Firstly, we acquire the crucial zero-coupling condition that is only dependent on the geometric design of the layout. Secondly, the upper bound of the qubit–qubit effective coupling is found as 0.0822 ω l / β s 2 which surprisingly depends only on the artificially pre-decided quantities ω l , β s instead of specific layouts. Thirdly, we propose an optimal layout design procedure to reach the very upper bound, leading to efficient and high-performance layout design. The effectiveness of the procedure has been demonstrated scrupulously using electromagnetic simulation experiments. As a stirring application, we report a state-of-the-art 3202 um long-range and scalable QCQ layout that is especially crucial to quantum error correction. Our work provides practical guides to optimize the performance of the existing coupler architecture, find out novel layouts, and further advance the progress of quantum chip design automation.

DOI
10.1088/2058-9565/ace8b6

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Abstract Superconducting coupler architecture demonstrates great potential for scalable and high-performance quantum processors, yet how to design efficiently and automatically ‘Qubit–Coupler–Qubit (QCQ)’ of high performance from the layout perspective remains obscure. In this work, this issue is studied for the first time resulting in three key findings. Firstly, we acquire the crucial zero-coupling condition that is only dependent on the geometric design of the layout. Secondly, the upper bound of the qubit–qubit effective coupling is found as 0.0822 ω l / β s 2 which surprisingly depends only on the artificially pre-decided quantities ω l , β s instead of specific layouts. Thirdly, we propose an optimal layout design procedure to reach the very upper bound, leading to efficient and high-performance layout design. The effectiveness of the procedure has been demonstrated scrupulously using electromagnetic simulation experiments. As a stirring application, we report a state-of-the-art 3202 um long-range and scalable QCQ layout that is especially crucial to quantum error correction. Our work provides practical guides to optimize the performance of the existing coupler architecture, find out novel layouts, and further advance the progress of quantum chip design automation.
Superconducting circuits have emerged as one of the most promising and scalable platforms for quantum com- puting, with substantial industrial adoption driving qubit counts steadily upward. Yet the layout of the corresponding chips is still primarily performed manually, consuming multiple days or weeks of expert effort, even for moderately sized designs. Existing automation approaches sidestep this bottleneck by simplifying the underlying problem and relaxing physical constraints. Therefore, they fall short of fabrication-ready results. To overcome this scalability wall without such compromises, we first introduce a formal abstraction that translates physical device characteristics into a rigorous geometric problem formulation. This abstraction bridges physical realization and design automation. Building upon this abstraction, we then propose a three-stage design automation flow comprising geometry-aware global partitioning, ILP-based port assignment, and a hierarchical routing pipeline. Evaluations conducted by our interdisciplinary team of design au- tomation researchers and superconducting hardware experts con- firm that the resulting flow produces complete, manufacturing- ready layouts that comply with the physical design rules at the push of a button. That is, it operates fully automatically within seconds to a few minutes, and solves complex instances up to 25x faster than the state of the art. All methods are released as the fully open-source tool mqt-scpd as part of the Munich Quantum Toolkit, providing the first readily usable, end- to-end design flow for planar superconducting quantum chips that explicitly addresses the underlying physical characteristics and requirements.
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More computational resources (i.e., more physical qubits and qubit connections) on a superconducting quantum processor not only improve the performance but also result in more complex chip architecture with lower yield rate. Optimizing both of them simultaneously is a difficult problem due to their intrinsic trade-off. Inspired by the application-specific design principle, this paper proposes an automatic design flow to generate simplified superconducting quantum processor architecture with negligible performance loss for different quantum programs. Our architecture-design-oriented profiling method identifies program components and patterns critical to both the performance and the yield rate. A follow-up hardware design flow decomposes the complicated design procedure into three subroutines, each of which focuses on different hardware components and cooperates with corresponding profiling results and physical constraints. Experimental results show that our design methodology could outperform IBM's general-purpose design schemes with better Pareto-optimal results.,0
The path toward practical superconducting quantum processors requires the integration of a large number of high-performance qubits. Modular architectures could offer a way to address the scaling limitations of monolithic designs by partitioning a large quantum processor into physically separated modules, or chiplets, linked through long-range interconnects. In this context, although fluxonium qubits have emerged as a compelling platform for quantum computing due to their long coherence times and high-fidelity gates, existing coupling schemes remain restricted to qubits in close proximity on a single chip. This limitation inherently precludes the long-range interconnects essential for modular integration. In this work, we propose a long-range tunable coupler designed to interconnect fluxonium qubits separated by more than one centimeter, thereby supporting the realization of modular fluxonium quantum processors. Under realistic assumptions, the proposed coupler has the potential to achieve inter-module two-qubit gate performance, specifically sub-100-ns gates with intrinsic errors below 10−410^{-4}10−4, comparable to that of intra-module (intra-chiplet) gates, while enabling modular integration with low quantum crosstalk, a key requirement for scalable systems. We further discuss the integration of this coupler into modular fluxonium lattices and explore its feasibility for achieving the higher connectivity and longer coupling range required for complex quantum error correction codes. This work could contribute to the development of large-scale fluxonium quantum processors by bridging their demonstrated potential with modular scalability.
Abstract Superconducting circuits have emerged as a promising platform to build quantum processors. The challenge of designing a circuit is to compromise between realizing a set of performance metrics and reducing circuit complexity and noise sensitivity. At the same time, one needs to explore a large design space, and computational approaches often yield long simulation times. Here, we automate the circuit design task using SCILLA. The software SCILLA performs a parallelized, closed-loop optimization to design superconducting circuit diagrams that match predefined properties, such as spectral features and noise sensitivities. We employ it to design 4-local couplers for superconducting flux qubits and identify a circuit that outperforms an existing proposal with a similar circuit structure in terms of coupling strength and noise resilience for experimentally accessible parameters. This work demonstrates how automated design can facilitate the development of complex circuit architectures for quantum information processing.
The design of coupler-based superconducting two-qubit gates simplifies circuit layout and alleviate frequency crowding, thereby enhancing the scalability and flexibility of quantum chips. However, in such architectures, a trade-off often exists between suppressing crosstalk and reducing gate duration, and how to achieve synergistic optimization of both remains an open challenge. To address this, this paper proposes a coupler-assisted superconducting two-qubit geometric gate scheme oriented towards crosstalk robustness. By introducing additional parametric degrees of freedom, the scheme steers the system evolution along desired trajectories, thereby flexibly avoiding crosstalk-sensitive operational regions. Numerical simulations demonstrate that the proposed scheme can effectively suppress crosstalk errors while enabling fast gate operations, and exhibits strong robustness against typical experimental imperfections such as qubit frequency drift. Moreover, even when accounting for unavoidable high-frequency oscillation terms and qubit decoherence in realistic physical systems, our crosstalk-robust two-qubit geometric gates still achieve high fidelity. This work provides a feasible pathway toward robust and efficient two-qubit gate implementation in superconducting quantum computation.