Reversible computation has been proposed as a future paradigm for energy efficient computation, but so far few implementations have been realized in practice. Quantum circuits, running on quantum computers, are one construct known to be reversible. In this work, we provide a proof-of-principle of classical logical gates running on quantum technologies. In particular, we propose and realize experimentally, Toffoli and Half-Adder circuits suitable for classical computation, using radio frequency-controlled 171Yb+ ions in a macroscopic linear Paul-trap as qubits. We analyze the energy required to operate the logic gates, both theoretically and experimentally, with a focus on the control energy. We identify bottlenecks and possible improvements in future platforms for energetically efficient computation, e.g., trap chips with integrated antennas and cavity qed. Our experimentally verified energetic model also fills a gap in the literature of the energetics of quantum information and outlines the path for its detailed study, as well as its potential applications to classical computing.
Reversible computation has been proposed as a future paradigm for energy efficient computation, but so far few implementations have been realized in practice. Quantum circuits, running on quantum computers, are one construct known to be reversible. In this work, we provide a proof-of-principle of classical logical gates running on quantum technologies. In particular, we propose and realize experimentally, Toffoli and Half-Adder circuits suitable for classical computation, using radio frequency-controlled 171Yb+ ions in a macroscopic linear Paul-trap as qubits. We analyze the energy required to operate the logic gates, both theoretically and experimentally, with a focus on the control energy. We identify bottlenecks and possible improvements in future platforms for energetically efficient computation, e.g., trap chips with integrated antennas and cavity qed. Our experimentally verified energetic model also fills a gap in the literature of the energetics of quantum information and outlines the path for its detailed study, as well as its potential applications to classical computing.
Quantum computing is an emerging computational paradigm that represents and processes information using quantum states. This paper presents the implementation and simulation of a Quantum Half Adder using the IBM Qiskit framework. The proposed circuit performs one-bit binary addition and produces two outputs, SUM and CARRY, through reversible quantum operations. Classical input values are encoded into quantum states using Pauli-X gates. Controlled-NOT (CNOT) gates are used to realize the XOR relationship required for SUM generation, while a Toffoli (CCNOT) gate realizes the AND relationship required for CARRY generation. The complete design is implemented in Python and executed using the Qiskit Aer Simulator. Four possible input combinations are evaluated and the measured outputs are compared with the expected Half Adder truth table. Circuit visualization, terminal output, and measurement histograms are used to verify the operation. The results show that the simulated circuit produces the expected SUM and CARRY values for all input combinations. The work provides a simple practical model for understanding reversible quantum computation, quantum gates, and Qiskit-based quantum circuit simulation.
Quantum computing represents a paradigm shift in computation by leveraging the principles of quantum mechanics such as superposition, entanglement, and interference to perform operations beyond classical limitations. Unlike classical computing systems that rely on irreversible logic operations and suffer from energy dissipation due to information loss, quantum systems utilize reversible unitary transformations that preserve information and improve computational efficiency. This paper presents a comprehensive framework for the design, simulation, and validation of quantum gates and reversible arithmetic circuits, including half adders and half subtractors. The proposed approach systematically maps classical arithmetic logic into quantum circuits using fundamental quantum gates such as Pauli-X, Hadamard, Controlled-NOT (CNOT), and Toffoli gates. The circuits are implemented and simulated using the Qiskit Aer framework, enabling detailed analysis of quantum state evolution and measurement outputs. The results obtained from simulation include program-level outputs, state vector representations, measurement counts, and probability distributions, all of which demonstrate strong agreement with classical truth tables. The analysis confirms the correctness, reversibility, and scalability of the proposed designs. Furthermore, a comparative performance evaluation highlights the advantages of quantum computing over classical approaches in terms of parallelism and energy efficiency. The proposed framework establishes a robust foundation for future implementation of complex Boolean logic and arithmetic operations in quantum systems.
Quantum computing (Q-computing) is a revolutionary technology that applies quantum mechanics (QM) to implement calculations significantly quicker than traditional computers. Q-computing employs Q-bits (qubits) rather than classical bits, which can take on a superposition state, making it possible to represent both 0 and 1 at once. This distinctive property allows qubits to perform multiple calculations simultaneously, making Q computers exponentially more powerful as more qubits are added, compared to the linear scaling of classical computers. However, challenges such as qubit instability and error rates remain significant obstacles to fully realizing this potential. A vital aspect of this technology is the development of Q arithmetic circuits, which act as the foundational blocks for efficiently executing Q algorithms. Q half-adder and full-adder circuits are integral to performing fundamental arithmetic operations within Q computers. In contrast to classical adders, Q adders rely on Q gates such as Controlled NOT (CNOT) and Toffoli gates. These gates exploit Q phenomena like entanglement and superposition, allowing for more efficient computations. The Q half-adder consists of two qubits and adds two single bits, producing a carry and sum output. It utilizes the CNOT gate to compute the sum and the Toffoli gate (controlled-controlled-NOT [CCNOT]) to compute the carry. The Q full-adder builds on this, adding three qubits to produce a sum and a carry output, further increasing computational capacity. Through the entanglement of qubits, these circuits allow for more parallelism and speed compared to classical adders. Q carry-look-ahead adders (QCLAs) and Q ripple-carry adders (QRCAs) are used to perform more complex arithmetic operations based on these half-adder and full-adder structures. Q arithmetic circuits have broad applications, boosting secure key generation in cryptography, speeding up matrix operations for faster model training in machine learning, and enabling more precise, efficient image transformations in Q image processing, benefiting fields like medical imaging and computer vision.
Atomic-scale logic and the minimization of heating (dissipation) are both very high on the agenda for future computation hardware. An approach to achieve these would be to replace networks of transistors directly by classical reversible logic gates built from the coherent dynamics of a few interacting atoms. As superpositions are unnecessary before and after each such gate (inputs and outputs are bits), the dephasing time only needs to exceed a single gate operation time, while fault tolerance should be achieved with low overhead, by classical coding. Such gates could thus be a spin-off of quantum technology much before full-scale quantum computation. Thus motivated, we propose methods to realize the 3-bit Toffoli and Fredkin gates universal for classical reversible logic using a single time-independent 3-qubit Hamiltonian with realistic nearest neighbour two-body interactions. We also exemplify how these gates can be composed to make a larger circuit. We show that trapped ions may soon be scalable simulators for such architectures, and investigate the prospects with dopants in silicon.
One of the major problems in designing highly compact digital systems is the rate of power consumption and internal heat generated by the loss of information during the computation. The tendency of current circuit design technologies is towards Nanoscale. Quaternary reversible logic is an emerging technology for the future designing of the quantum systems since quantum reversible circuits can be realized in Nanoscales. The adder building block is an essential part of any computer system. This block must be designed efficiently. We proposed a new quaternary quantum reversible half adder with the quantum cost of 17 and a quaternary quantum reversible full adder with a quantum cost of 23. For the first time in the literature, we report that we proposed quaternary quantum reversible half adder as well as full adder with an optimum number of constant inputs. As the circuit lines in the domain of quantum computation are considered to be a very limited resource, the achievements in this paper are promising. The proposed circuits are efficient in terms of all figures of merits in comparison to the existing counterparts. To design these adder circuits, we used 1-qudit and 2-qudit quaternary gates.
In the context of modern Very Large-Scale Integration (VLSI) technology, information loss has been a major concern. Logic gates (LG) such as AND, OR, and NOT have been found to result in information loss during their operations. To address this issue, reversible LGs have been created. The development and implementation of a high-speed, efficient full adder circuit employing reversible LGs like Feynman, Toffoli, and Peres gates. The design aims to improve computational and thermal efficiencies. The circuit refarding quantum costs (QC), garbage outputs, and ancillary inputs. The implemented the suggested design in Verilog and verified the entire adder's functionality and efficiency through simulations using the Xilinx Vivado and Xilinx ISE tools. The circuit has a quantum cost of 10 with two outputs of useless and one auxiliary input, according to the researchers, highlighting its opportunities for usage in quantum computing applications andlow-power (dec 84%), high-performance computing systems.