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arXiv:2210.04857 · Physical Review Letters

Efficient Characterization of Qudit Logical Gates with Gate Set Tomography Using an Error-Free Virtual Z Gate Model

Shuxiang Cao, Deep Lall, Mustafa S. Bakr, Giulio Campanaro, Simone D Fasciati, James Wills, Vivek Chidambaram, Boris Shteynas, Ivan Rungger, Peter Leek

Published Sep 17, 2024• 11 citations
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Abstract

Gate set tomography (GST) characterizes the process matrix of quantum logic gates, along with measurement and state preparation errors in quantum processors. GST typically requires extensive data collection and significant computational resources for model estimation. We propose a more efficient GST approach for qudits, utilizing the qudit Hadamard and virtual Z gates to construct fiducials while assuming virtual Z gates are error-free. Our method reduces the computational costs of estimating characterization results, making GST more practical at scale. We experimentally demonstrate the applicability of this approach on a superconducting transmon qutrit.

DOI
10.1103/physrevlett.133.120802

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Gate set tomography (GST) characterizes the process matrix of quantum logic gates, along with measurement and state preparation errors in quantum processors. GST typically requires extensive data collection and significant computational resources for model estimation. We propose a more efficient GST approach for qudits, utilizing the qudit Hadamard and virtual Z gates to construct fiducials while assuming virtual Z gates are error-free. Our method reduces the computational costs of estimating characterization results, making GST more practical at scale. We experimentally demonstrate the applicability of this approach on a superconducting transmon qutrit.
Gate set tomography (GST) is a protocol for detailed, predictive characterization of logic operations (gates) on quantum computing processors. Early versions of GST emerged around 2012-13, and since then it has been refined, demonstrated, and used in a large number of experiments. This paper presents the foundations of GST in comprehensive detail. The most important feature of GST, compared to older state and process tomography protocols, is that it is calibration-free . GST does not rely on pre-calibrated state preparations and measurements. Instead, it characterizes all the operations in a gate set simultaneously and self-consistently, relative to each other. Long sequence GST can estimate gates with very high precision and efficiency, achieving Heisenberg scaling in regimes of practical interest. In this paper, we cover GST's intellectual history, the techniques and experiments used to achieve its intended purpose, data analysis, gauge freedom and fixing, error bars, and the interpretation of gauge-fixed estimates of gate sets. Our focus is fundamental mathematical aspects of GST, rather than implementation details, but we touch on some of the foundational algorithmic tricks used in the pyGSTi implementation.
Quantum error correction (QEC) can strongly suppress noise, but predicting whether a computation succeeds requires understanding not only how much effective noise persists after QEC, but what form that noise takes. To thoroughly characterize this noise, we introduce logical gate set tomography (``logical GST''). Logical GST produces detailed representations of noisy logical operations that can be used to derive higher-level metrics, such as gate fidelity and diamond distance, and to test for non-Markovian and coherent logical errors. We use logical GST to obtain the first full, self-consistent characterization of a universal single-qubit logical gate set, implemented in the seven-qubit Steane code using Quantinuum System Model H1, a 20-qubit trapped-ion quantum processor. In the experimental data from H1, logical GST identified predominantly logical Pauli-stochastic errors, found no evidence of logical non-Markovianity, and detected weak potential signatures of coherent logical error. By contrast, higher-shot datasets generated with Quantinuum's detailed system emulator, identify mechanisms for weak but statistically significant logical non-Markovianity and strong evidence of coherent logical error. Finally, we use logical GST to perform error attribution with the system emulator, revealing how specific physical error sources shape logical error mechanisms.
Physical models of quantum gates can directly incorporate experimental degrees of freedom, such as laser power or microwave phase, but the forward simulation required to use these models can result in impractical overhead in computational time.In this poster, we develop a method for efficient, accurate interpolation of quantum process matrices over physical parameter space, and we apply our method to study the sensitivity of quantum applications at both the gate level and circuit level.We then implement an extension of gate-set tomography (GST) that provides a comprehensive view into the errors suffered by a quantum information processor.In its standard form, GST fits a general Markovian model to experimental data in terms of process matrices that are often difficult to interpret.Our extension to this method uses process matrices interpolated over physical parameters in the optimization loop of GST to directly estimate physical model parameters, providing a clear description of the errors in a quantum processor, while reducing the required number of GST sequences by orders of magnitude compared to its standard form.
Characterizing errors on many-qubit quantum computers remains a key challenge to understanding and improving the performance of these devices. Current characterization methods either don't scale beyond a few qubits, or make simplifying assumptions (such as assuming stochastic Pauli error) that obscure the underlying physical error mechanisms. In this work, we present a scalable extension to gate set tomography-linearized gate set tomography-that enables characterization of many-qubit systems. Linearized gate set tomography relies on sparse error models, a linear approximation to enable efficient data fitting, and data from shallow circuits-so that the systematic error in the linear approximation is small. We demonstrate the accuracy of our technique using simulations of a ten-qubit system with coherent and stochastic errors, including coherent crosstalk, and we demonstrate that it is robust in presence of additional errors that are not included within the sparse error model ansatz.
Gate set tomography (GST) is a self-consistent and highly accurate method for the tomographic reconstruction of a quantum information processor's quantum logic operations, including gates, state preparations, and measurements. However, GST's experimental cost grows exponentially with qubit number. For characterizing even just two qubits, a standard GST experiment may have tens of thousands of circuits, making it prohibitively expensive for platforms. We show that, because GST experiments are massively overcomplete, many circuits can be discarded. This dramatically reduces GST's experimental cost while still maintaining GST's Heisenberg-like scaling in accuracy. We show how to exploit the structure of GST circuits to determine which ones are superfluous. We confirm the efficacy of the resulting experiment designs both through numerical simulations and via the Fisher information for said designs. We also explore the impact of these techniques on the prospects of three-qubit GST.
The efficiency of Quantum Characterisation, Verification, and Validation (QCVV) protocols highly hinges on the agreement between the assumed noise model and the underlying error mechanisms. As a matter of fact, errors in Quantum Processing Units (QPUs) incorporate various aspects of context-dependability which are overlooked by the majority of the commonly used QCVV protocols. As QCVV protocols are indispensable when it comes to characterizing and evaluating quantum operations, there is a serious need for a detailed characterization taking into account such aspects. In this work, we address these shortcomings by designing a context-aware version of the gate set tomography (GST) protocol. Our experiment selection approach is based on a polynomial quantification of the accumulation of errors within the designed circuits. Using simulated QPUs, we show that this technique enables a characterization with an inaccuracy reaching 10−510^{-5}10−5. Furthermore, we use our proposed protocol to experimentally infer context-dependent errors, namely crosstalk and memory effects, in a publicly accessible cloud-based superconducting qubits platform. Our results show that when the GST is upgraded to include such features of context-awareness, a large coherence in the errors is observed. These findings open up possibilities of drastically reducing the errors within the currently demonstrated QPUs.