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arXiv:2204.00276

Ising machines as hardware solvers of combinatorial optimization problems

Naeimeh Mohseni, Peter L. McMahon, Tim Byrnes

Published Apr 1, 2022• 0 citations
arXivHTMLPDF

Abstract

Ising machines are hardware solvers which aim to find the absolute or approximate ground states of the Ising model. The Ising model is of fundamental computational interest because it is possible to formulate any problem in the complexity class NP as an Ising problem with only polynomial overhead. A scalable Ising machine that outperforms existing standard digital computers could have a huge impact for practical applications for a wide variety of optimization problems. In this review, we survey the current status of various approaches to constructing Ising machines and explain their underlying operational principles. The types of Ising machines considered here include classical thermal annealers based on technologies such as spintronics, optics, memristors, and digital hardware accelerators; dynamical-systems solvers implemented with optics and electronics; and superconducting-circuit quantum annealers. We compare and contrast their performance using standard metrics such as the ground-state success probability and time-to-solution, give their scaling relations with problem size, and discuss their strengths and weaknesses.

DOI
10.48550/arxiv.2204.00276

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Ising machines are hardware solvers which aim to find the absolute or approximate ground states of the Ising model. The Ising model is of fundamental computational interest because it is possible to formulate any problem in the complexity class NP as an Ising problem with only polynomial overhead. A scalable Ising machine that outperforms existing standard digital computers could have a huge impact for practical applications for a wide variety of optimization problems. In this review, we survey the current status of various approaches to constructing Ising machines and explain their underlying operational principles. The types of Ising machines considered here include classical thermal annealers based on technologies such as spintronics, optics, memristors, and digital hardware accelerators; dynamical-systems solvers implemented with optics and electronics; and superconducting-circuit quantum annealers. We compare and contrast their performance using standard metrics such as the ground-state success probability and time-to-solution, give their scaling relations with problem size, and discuss their strengths and weaknesses.
Ising machines have received growing interest as efficient and hardware-friendly solvers for combinatorial optimization problems (COPs). They search for the absolute or approximate ground states of the Ising model with a proper annealing process. In contrast to Ising machines built with superconductive or optical circuits, complementary metal-oxide-semiconductor (CMOS) Ising machines offer inexpensive fabrication, high scalability, and easy integration with mainstream semiconductor chips. As low-energy and CMOS-compatible emerging technologies, spintronics and phase-transition devices offer functionalities that can enhance the scalability and sampling performance of Ising machines. In this article, we survey various approaches in the process flow for solving COPs using CMOS, hybrid CMOS-spintronic, and phase-transition devices. First, the methods for formulating COPs as Ising problems and embedding Ising formulations to the topology of the Ising machine are reviewed. Then, Ising machines are classified by their underlying operational principles and reviewed from a perspective of hardware implementation. CMOS solutions are advantageous with denser connectivity, whereas hybrid CMOS-spintronic and phase-transition device-based solutions show great potential in energy efficiency and high performance. Finally, the challenges and prospects are discussed for the Ising formulation, embedding process, and implementation of Ising machines.
Combinatorial optimization problems are central to many challenges in logistics, finance, engineering, and the life sciences, yet they remain among the most computationally demanding. Many of these problems can be mapped onto the Ising model, in which binary spins interact through a network of couplings, and solutions correspond to low-energy, ideally ground-state, spin configurations. Photonic Ising machines have the potential to be fast and energy-efficient heuristic solvers of optimization problems by leveraging the low latency, high bandwidth, and inherent parallelism of optics. However, current photonic implementations remain limited in scalability, connectivity, reconfigurability, and time-to-solution, preventing their use in many practical applications. In this perspective, we examine the current landscape of photonic Ising machines, discuss the challenges and limitations of existing platforms, and identify the scientific and technological advances needed to realize large-scale systems. These developments could establish photonic Ising machines as useful hardware platforms for practical optimization.
ABSTRACT Combinatorial optimization problems (COPs) are fundamental to numerous applications but remain challenging due to their exponentially large solution spaces and the limitations of conventional computing architectures. Ising machines have emerged as a promising alternative by mapping optimization problems onto the energy minimization of the Ising Hamiltonian. Various hardware implementations, including quantum annealers, digital annealers, and coherent Ising machines, have been explored based on distinct physical mechanisms. More recently, emerging device‐based approaches have gained significant attention for their potential to enable scalable and energy‐efficient optimization. In this review, we present a comprehensive overview of Ising machines from both theoretical and hardware perspectives, with particular emphasis on three emerging‐device‐based platforms: crossbar array‐based, stochastic p‐bit, and oscillator‐based Ising machines. We establish a comparative device‐to‐system perspective that traces how distinct physical and device properties translate into computational primitives, hardware architectures, and ultimately system‐level scalability. Platform‐specific bottlenecks, including array nonidealities and peripheral overhead in crossbar‐based systems, device variability and probability‐generation overhead in p‐bit systems, and synchronization and coupling‐network complexity in oscillator‐based systems, are quantitatively and qualitatively analyzed. Finally, we discuss future directions toward scalable and energy‐efficient Ising hardware through device‐to‐system co‐optimization across devices, circuits, architectures, and algorithms.
The demand for efficient solvers of complicated combinatorial optimization problems, especially those classified as NP-complete or NP-hard, has recently led to increased exploration of novel computing architectures. One prominent collective state computing paradigm embodied in the so-called Ising machines has recently attracted considerable research attention due to its ability to optimize complex problems with large numbers of interacting variables. Ising model-inspired solvers, thus named due to mathematical similarities to the well-known model from solid-state physics, represent a promising alternative to traditional von Neumann computer architectures due to their high degree of inherent parallelism. While there are many possible physical realizations of Ising solvers, just as there are many possible implementations of any binary computer, photonic Ising machines (PIMs) use primarily optical components for computation, taking advantage of features like lower power consumption, fast calculation speeds, the leveraging of physical optics to perform the calculations themselves, possessing decent scalability and noise tolerance. Photonic computing in the form of PIMs may offer certain computational advantages that are not easily achieved with non-photonic approaches and is nonetheless an altogether fascinating application of photonics to computing. In this review, we provide an overview of Ising machines generally, introducing why they are useful, what types of problems they can tackle, and how different Ising solvers can be compared and benchmarked. We delineate their various operational mechanisms, advantages, and limitations vis-à-vis non-photonic Ising machines. We describe their scalability, interconnectivity, performance, and physical dimensions. As research in PIMs continues to progress, there is a potential that photonic computing could well emerge as a way to handle large and challenging optimization problems across diverse domains. This review serves as a comprehensive resource for researchers and practitioners interested in understanding capabilities and potential of PIMs in addressing such complex optimization problems.
Ising machines are effective solvers for complex combinatorial optimization problems. The idea is mapping the optimal solution(s) to a combinatorial optimization problem to the minimum energy state(s) of a physical system, which naturally converges to a minimum energy state upon perturbance. The underlying mathematical abstraction, the Ising model, can capture the dynamic behavior of different physical systems by mapping each problem variable to a spin which can interact with other spins. Ising model as a mathematical abstraction can be mapped to hardware using traditional devices. In this paper we instead focus on Ising machines which represent a network of physical spins directly implemented in hardware using, e.g., quantum bits or electronic oscillators. To eliminate the scalability bottleneck due to the mismatch in problem vs. Ising machine size and connectivity, in this paper we make the case for HETRI: Heterogeneous Ising Multiprocessing. HETRI organizes the maximum number of physical spins that the underlying technology supports in Ising cores; and multiple independent Ising cores, in Ising chips. Ising cores in a chip feature different inter-spin connectivity or spin counts to match the problem characteristics. We provide a detailed design space exploration and quantify the performance in terms of time or energy to solution and solution accuracy with respect to homogeneous alternatives under the very same hardware budget and considering the very same spin technology.
Many combinatorial optimization problems can be reformulated as finding the ground state of the Ising model. Existing Ising solvers are mostly inspired by simulated annealing. Although annealing techniques offer scalability, they lack convergence guarantees and are sensitive to the cooling schedule. We propose solving the Ising problem by relaxing the binary spins to continuous variables and introducing an attraction potential that steers the solution toward binary spin configurations. A key property of this potential is that its combination with the Ising energy produces a Hamiltonian that can be written as a difference of convex polynomials. This enables us to design efficient iterative algorithms that require a single matrix-vector multiplication per iteration and provide convergence guarantees. We implement our Ising solver on a wide range of GPU platforms, from edge devices to high-performance computing clusters, and demonstrate that it consistently outperforms existing solvers across problem sizes ranging from small (10310^3103 spins) to ultra-large (10810^8108 spins).