Superconducting qubits provide a promising path toward building large-scale quantum computers. The simple and robust transmon qubit has been the leading platform, achieving multiple milestones. However, fault-tolerant quantum computing calls for qubit operations at error rates significantly lower than those exhibited in the state of the art. Consequently, alternative superconducting qubits with better error protection have attracted increasing interest. Among them, fluxonium is a particularly promising candidate, featuring large anharmonicity and long coherence times. Here, we engineer a fluxonium-based quantum processor that integrates high qubit coherence, fast frequency tunability, and individual-qubit addressability for reset, readout, and gates. With simple and fast gate schemes, we achieve an average single-qubit gate fidelity of 99.97% and a two-qubit gate fidelity of up to 99.72%. This performance is comparable to the highest values reported in the literature of superconducting circuits. Thus our work, within the realm of superconducting qubits, reveals an alternative qubit platform that is competitive with the transmon system.
Superconducting qubits provide a promising path toward building large-scale quantum computers. The simple and robust transmon qubit has been the leading platform, achieving multiple milestones. However, fault-tolerant quantum computing calls for qubit operations at error rates significantly lower than those exhibited in the state of the art. Consequently, alternative superconducting qubits with better error protection have attracted increasing interest. Among them, fluxonium is a particularly promising candidate, featuring large anharmonicity and long coherence times. Here, we engineer a fluxonium-based quantum processor that integrates high qubit coherence, fast frequency tunability, and individual-qubit addressability for reset, readout, and gates. With simple and fast gate schemes, we achieve an average single-qubit gate fidelity of 99.97% and a two-qubit gate fidelity of up to 99.72%. This performance is comparable to the highest values reported in the literature of superconducting circuits. Thus our work, within the realm of superconducting qubits, reveals an alternative qubit platform that is competitive with the transmon system.
The technological development of hardware heading toward universal fault-tolerant quantum computation requires a large-scale processing unit with high performance. While fluxonium qubits are promising with high coherence and large anharmonicity, their scalability has not been systematically explored. In this work, we propose a superconducting quantum information processor based on compact high-coherence fluxoniums with suppressed crosstalk, reduced design complexity, improved operational efficiency, high-fidelity gates, and resistance to parameter fluctuations. In this architecture, the qubits are readout dispersively using individual resonators connected to a common bus and manipulated via combined on-chip RF and DC control lines, both of which can be designed to have low crosstalk. A multi-path coupling approach enables exchange interactions between the high-coherence computational states and at the same time suppresses the spurious static ZZ rate, leading to fast and high-fidelity entangling gates. We numerically investigate the cross resonance controlled-NOT and the differential AC-Stark controlled-Z operations, revealing low gate error for qubit-qubit detuning bandwidth of up to 1 GHz. Our study on frequency crowding indicates high fabrication yield for quantum processors consisting of over thousands of qubits. In addition, we estimate low resource overhead to suppress logical error rate using the XZZX surface code. These results promise a scalable quantum architecture with high performance for the pursuit of universal quantum computation.
Abstract Superconducting fluxonium qubits provide a promising alternative to transmons on the path toward large-scale superconductor-based quantum computing due to their better coherence and larger anharmonicity. A major challenge for multi-qubit fluxonium devices is the experimental demonstration of a scalable crosstalk-free multi-qubit architecture with high-fidelity single-qubit and two-qubit gates, single-shot readout, and state initialization. Here, we present a two-qubit fluxonium-based quantum processor with a tunable coupler element. We experimentally demonstrate fSim-type and controlled-Z-gates with 99.55 and 99.23% fidelities, respectively. The residual ZZ interaction is suppressed down to the few kHz levels. Using a galvanically coupled flux control line, we implement high-fidelity single-qubit gates and ground state initialization with a single arbitrary waveform generator channel per qubit.
Superconducting quantum processors have largely converged on transmon-based architectures, while alternative qubit modalities with intrinsic error protection have lacked a demonstrated path to scalable system integration. In particular, although tunable-coupler-mediated interactions have been validated for small fluxonium systems, it remains unclear whether such designs can be scaled to a multi-qubit lattice. Here, we establish a scalable fluxonium processor architecture based on a modular qubit-coupler unit cell engineered to suppress residual interactions and spectator errors in a many-qubit lattice. The system enables parallel single-qubit gate fidelities approaching 99.99% and two-qubit CZ gate fidelities around 99%. With an optimized gate duration of 32 ns, the best CZ gate fidelity reaches 99.9%. We further validate this architecture in a 22-qubit processor based on the same configuration, where parallel operations enable the deterministic generation of Greenberger-Horne-Zeilinger states involving up to 10 qubits. Together, these results demonstrate that the fluxonium-tunable-coupler unit cell composes without emergent interaction pathologies and establish fluxonium as a scalable superconducting qubit platform.
The fluxonium qubit has emerged as a promising candidate for superconducting quantum computing due to its long coherence times and high-fidelity gates. Nonetheless, further scaling up and improving performance remain critical challenges for establishing fluxoniums as a viable alternative to transmons. A key obstacle lies in developing scalable coupling architectures. In this work, we introduce a scalable fluxonium architecture that enables decoupling of qubit states while maintaining tunable couplings between non-computational states. Beyond the well-studied ZZ crosstalk, we identify that always-on interactions involving non-computational levels can significantly degrade the fidelities of initialization, control, and readout in large systems, thereby impeding scalability. Based on two possible physical realizations of the architecture, we demonstrate that the issue can be mitigated by implementing tunable couplings for fluxonium plasmon transitions, meanwhile enabling fast, high-fidelity gates with passive ZZ suppression. This comparative analysis enables us to establish general principles for realizing the architecture while understanding and addressing implementation-specific challenges.
Transforming stand-alone qubits into a functional, general-purpose quantum processing unit requires an architecture where many-body quantum entanglement can be generated and controlled in a coherent, modular, and measurable fashion.Electronic circuits promise a well-developed pathway for large-scale integration once a mature library of quantum-compatible elements have been developed.In the domain of superconducting circuits, fluxonium has recently emerged as a promising qubit due to its high-coherence and large anharmonicity, yet its scalability has not been systematically explored.In this work, we present a blueprint for a high-performance fluxonium-based quantum processor that addresses the challenges of frequency crowding, and both quantum and classical crosstalk.The main ingredients of this architecture include high-anharmonicity circuits, multipath couplers to entangle qubits where spurious longitudinal coupling can be nulled, circuit designs that are compatible with multiplexed microwave circuitry, and strongly coupled readout channels that do not require complex, frequency-sculpted elements to maintain coherence.In addition, we explore robust and resource-efficient protocols for quantum logical operations, then perform numerical simulations to validate the expected performance of this proposed processor with respect to gate fidelity, fabrication yield, and logical error suppression.Lastly, we discuss practical considerations to implement the architecture and achieve the anticipated performance.
Fluxonium qubits combine long coherence times with strong anharmonicity, making them a promising platform for scalable superconducting quantum processors. Recent experiments have demonstrated high-fidelity operations in multi-qubit processors while suppressing stray qubit interactions using fluxonium-transmon-fluxonium (FTF) architectures. However, scaling such systems to larger arrays is constrained by a trade-off between achievable coupling strength, crosstalk suppression and qubit-qubit spacing required for wiring in a two-dimensional architecture. Multimode couplers, such as the double-transmon coupler (DTC), provide a promising pathway to overcome this limitation by enabling stronger interactions without compromising qubit spacing and isolation. Here, we develop a quantitative design framework for fluxonium-based quantum processors employing DTCs. Central to this work is a frequency-partitioned architecture that places qubit transitions, tunable-coupler excitations, and resonator modes in well-separated spectral regions. This structured allocation reduces parameter interdependence and enables the concurrent optimization of gate operations, readout, and qubit reset. By formulating device design as a multi-objective optimization problem under realistic experimental constraints and fabrication-induced disorder, we develop a tractable sequential workflow and determine a feasible parameter regime that simultaneously supports high-fidelity single- and two-qubit gates, fast qubit reset, and robust dispersive readout. These results establish a system-level architectural methodology that links circuit parameters to processor-level performance, and provide an experimentally actionable pathway toward scalable fluxonium quantum processors.