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arXiv:2105.07133 · IEEE International Conference on Artificial Intelligence and Computer Applications (ICAICA)

Low-overhead pieceable fault-tolerant construction of logical controlled-phase circuit for degenerate quantum code

Chen Lin, Guowu Yang, Jinzhao Wu

Published Jun 1, 2020• 0 citations
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Abstract

We propose a non-transversal but pieceable fault-tolerant conversion circuit that is used to convert encoded information between five-qubit code and seven-qubit CSS code. Since a syndrome extraction circuit requiring fewer ancillary qubit resources would facilitate the realization of large-scale quantum computations, we further adapt a flag-assisted fault-tolerant syndrome measurement scheme to reduce the cost of ancillary preparation. Numerical simulations are also performed to further analyze the performance of our conversion method.

DOI
10.1109/icaica50127.2020.9182439

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We propose a non-transversal but pieceable fault-tolerant conversion circuit that is used to convert encoded information between five-qubit code and seven-qubit CSS code. Since a syndrome extraction circuit requiring fewer ancillary qubit resources would facilitate the realization of large-scale quantum computations, we further adapt a flag-assisted fault-tolerant syndrome measurement scheme to reduce the cost of ancillary preparation. Numerical simulations are also performed to further analyze the performance of our conversion method.
Designing efficient fault-tolerant circuits for converting between two quantum codes is an effective way to realize universal fault-tolerant quantum computing. In this work, we adopt the round-robin circuit construction to design a conversion circuit between CSS 7-qubit error-correcting code and Reed-Muller 15-qubit code. We take the pieceable fault-tolerant protocol to guarantee the fault tolerance of our conversion circuit. A neural network decoding scheme is proposed to suppress the propagation of quantum errors. Our decoding scheme can effectively reduce the damaging effects of imperfect syndrome extraction operations and predict possible logical errors that occurred after the error correction process. We provide a detailed description of our syndrome data model and analyze the depolarizing noise threshold of our conversion circuit through numerical simulations of the stabilizer circuit.
Small high-rate non-CSS stabilizer codes provide compact platforms for encoded quantum computation, but mixed-Pauli checks and limited native transversal logical gates complicate fault-tolerant dynamics. Block-level constructions offer an alternative by mapping an entire logical block to a physical circuit rather than compiling separately protected logical gates. We investigate this approach using the high-rate [[8,3,3]] non-CSS code and logical Trotter circuits as a testbed. We construct flagged syndrome-extraction circuits and establish a circuit-level memory pseudo-threshold near 1.5×10−31.5\times10^{-3}1.5×10−3. We then apply our symplectic-transvection construction, which maps a logical Trotter circuit to a physical circuit with the same block pattern for any stabilizer code. Although this mapping preserves the intended unitary algebraically, encoded Trotter circuits exhibit asymmetry between logical-XXX and logical-ZZZ failure channels. Single-fault analysis identifies the mechanism: a fault on the shared parity ancilla can propagate through the uncomputation network into an undetectable logical operator, reducing the effective circuit distance in the affected sector. We evaluate flag-conditioned recovery, biased-noise decoding, CliNR resource verification, flag postselection, and asymmetric gate-noise models. These methods suppress propagated faults but do not simultaneously suppress both logical sectors in the realistic configurations studied. A diagnostic protected limit removing the identified malignant first-order locations restores pseudo-threshold behavior in both sectors, approaching memory performance. These results demonstrate the potential of block-level logical constructions for non-CSS codes without rich native transversal gate sets and the joint protection of the parity network, analog rotation, and recovery required to preserve fault-tolerant distance.
As existing approaches to get around the restriction of the no-go theorem generally exhibit high ancillary qubit overhead costs, we propose a scheme for universal fault-tolerant quantum computation by using the pieceable fault-tolerant protocol and code switching techniques. In additional, by utilizing the construction of the pieceable fault-tolerant circuit, we adopt a decoding strategy based on a deep-neural-network algorithm to improve the error threshold of the non-Clifford logical gate circuit. We describe our universal construction in detail with a two-level nonuniform concatenated 25-qubit code and perform numerical simulations to analyze the depolarizing noise threshold of a given universal gate set with this code. The resources required to implement this universal gate set are also estimated to further demonstrate the efficiency of our scheme. We compare these results with the existing universal concatenation methods and conclude that our method outperforms them in terms of the lower bound of the error threshold and qubit resource overhead.
Reliable quantum computation requires fault-tolerant protocols to prevent errors from propagating during syndrome extraction in quantum error correction. We present a novel fault-tolerant syndrome extraction technique for CSS codes, which we refer to as the cut-cat state scheme. While each ancilla qubit interacts non-fault-tolerantly with a pair of data qubits, we introduce additional cat stabilizer measurements to identify and correct the resulting hook errors. Our approach maintains the key benefit of cat-based extraction, i.e., parallelized data qubit interactions, while reducing the number of simultaneous qubits required by more than half. Compared to flag-based state-of-the-art protocols, the cut-cat scheme offers a notable advantage in terms of two-qubit gate count as the code distance increases.
Given that quantum error correction processes are unreliable, an efficient error syndrome extraction circuit should use fewer ancillary qubits, quantum gates, and measurements, while maintaining low circuit depth, to minimizing the circuit area, roughly defined as the product of circuit depth and the number of physical qubits. We propose to design parallel flagged syndrome extraction with shared flag qubits for quantum stabilizer codes. Versatile parallelization techniques are employed to minimize the required circuit area, thereby improving the error threshold and overall performance. Specifically, measurement outcomes across multiple rounds of syndrome extraction are integrated into a lookup table decoder, enabling parallelization of multiple stabilizer measurements with shared flag qubits. Additionally, we introduce an adaptive technique to reduce the overhead from excessive syndrome extraction. We present flag-sharing and fully parallel schemes for the[ ⁣[17,1,5] ⁣][\![17,1,5]\!][[17,1,5]],[ ⁣[19,1,5] ⁣][\![19,1,5]\!][[19,1,5]]Calderbank-Shor-Steane (CSS) codes and the[ ⁣[5,1,3] ⁣][\![5,1,3]\!][[5,1,3]]non-CSS code, where the[ ⁣[5,1,3] ⁣][\![5,1,3]\!][[5,1,3]]implementation achieves the minimum known circuit area. Numerical simulations have demonstrated improved pseudo-thresholds for these codes by up to an order of magnitude compared to previous schemes in the literature.
Quantum error-correcting codes are a vital technology for demonstrating reliable quantum computation. They require data qubits for encoding quantum information and ancillary qubits for taking error syndromes necessary for error correction. The need for a large number of ancillary qubits is an overhead specific to quantum computing, and it prevents the scaling of quantum computers to a useful size. In this work, we propose a framework for generating efficient syndrome measurement circuits with a few ancillary qubits in CSS codes and provide a method to minimize the total number of physical qubits in general settings. We demonstrated our proposal by applying it to surface codes, and we generated syndrome measurement circuits under several constraints of total qubit count. As a result, we find that balanced data and ancillary qubit counts achieve the lower logical error rates under a fixed total number of physical qubits. This result indicates that using fewer ancillary qubits than the number of stabilizers can be effective for reducing logical error rates in a practical noise model.