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arXiv:2102.12204

Scalable quantum random number generator for cryptography based on the random flip-flop approach

Mario Stipčević, Ivan Michel Antolović, Claudio E. Bruschini, Edoardo Charbon A

Published Feb 24, 2021• 2 citations

Abstract

For globally connected devices like smart phones, personal computers and Internet-of-things devices, the ability to generate random numbers is essential for execution of cryptographic protocols responsible for information security. Generally, a random number generator should be small, robust, utilize as few hardware and energy resources as possible, yet provide excellent randomness at a high enough speed (bitrate) for a given purpose. In this work we present a quantum random number generator (QRNG) which makes use of a photoelectric effect in single-photon avalanche diodes (SPADs) as a source of randomness and is scalable to any desired bitrate. We use the random flip-flop method in which random bits are obtained by periodic sampling of a randomly toggling flip-flop. For the first time we investigate this method in detail and find that, out of two main imperfections, bias is due only to hardware imperfections while autocorrelation predominantly resides with the method itself. SPADs are integrated on a silicon chip together with passive quenching and digital pulse-shaping circuitry, using a standard 180 nm CMOS process. A separate FPGA chip derives random numbers from the detection signals. The basic QRNG cell, made of only two SPADs and a few logic circuits, can generate up to 20 Mbit/s that pass NIST statistical tests without any further postprocessing. This technology allows integration of a QRNG on a single silicon chip using readily available industrial processes.

DOI: 10.48550/arxiv.2102.12204

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This work describes a monolithically integrated photonic quantum random number generator (QRNG) in

0.35 \mu ~\mathrm{m}

CMOS. This QRNG consists of a light-emitting diode inside a deep N-well, a ring single-photon avalanche diode (SPAD), a fast cascoded active quenching and resetting circuit, and an analog evaluation circuit determining whether the random bit is a “0” or “1”. The random bits are created by comparison of two consecutive time intervals between photon detections using charging and discharging a capacitor with a constant current as well as a comparator. The time intervals can be in the range from 10 ns to

10 \mu ~\mathrm{s}

. With

\pm 3.3 ~\mathrm{V}

supply voltage, the power consumption of the complete circuits is between 1.1 mW and 4.55 mW depending on the LED emission and detection rate of the SPAD. After XOR-hashing, the NIST tests were passed.