Abstract Quantum computing hardware is undergoing rapid development from proof-of-principle devices to scalable machines that could eventually challenge classical supercomputers on specific tasks. On platforms with local connectivity, the transition from one- to two-dimensional arrays of qubits is seen as a natural technological step to increase the density of computing power and to reduce the routing cost of limited connectivity. Here we map and schedule representative algorithmic workloads—the Quantum Fourier Transform (QFT) relevant to factoring, the Grover diffusion operator relevant to quantum search, and Jordan–Wigner parity rotations relevant to simulations of quantum chemistry and materials science—to qubit arrays with varying connectivity. In particular we investigate the impact of restricting the ideal all-to-all connectivity to a square grid, a ladder and a linear array of qubits. Our schedule for the QFT on a ladder results in running time close to that of a system with all-to-all connectivity. Our results suggest that some common quantum algorithm primitives can be optimized to have execution times on systems with limited connectivities, such as a ladder and linear array, that are competitive with systems that have all-to-all connectivity.
Abstract Quantum computing hardware is undergoing rapid development from proof-of-principle devices to scalable machines that could eventually challenge classical supercomputers on specific tasks. On platforms with local connectivity, the transition from one- to two-dimensional arrays of qubits is seen as a natural technological step to increase the density of computing power and to reduce the routing cost of limited connectivity. Here we map and schedule representative algorithmic workloads—the Quantum Fourier Transform (QFT) relevant to factoring, the Grover diffusion operator relevant to quantum search, and Jordan–Wigner parity rotations relevant to simulations of quantum chemistry and materials science—to qubit arrays with varying connectivity. In particular we investigate the impact of restricting the ideal all-to-all connectivity to a square grid, a ladder and a linear array of qubits. Our schedule for the QFT on a ladder results in running time close to that of a system with all-to-all connectivity. Our results suggest that some common quantum algorithm primitives can be optimized to have execution times on systems with limited connectivities, such as a ladder and linear array, that are competitive with systems that have all-to-all connectivity.
A primary objective of quantum computation is to efficiently simulate quantum physics. Scientifically and technologically important quantum Hamiltonians include those with spin-s, vibrational, photonic, and other bosonic degrees of freedom, i.e. problems composed of or approximated by d-level particles (qudits). Recently, several methods for encoding these systems into a set of qubits have been introduced, where each encoding's efficiency was studied in terms of qubit and gate counts. Here, we build on previous results by including effects of hardware connectivity. To study the number of SWAP gates required to Trotterize commonly used quantum operators, we use both analytical arguments and automatic tools that optimize the schedule in multiple stages. We study the unary (or one-hot), Gray, standard binary, and block unary encodings, with three connectivities: linear array, ladder array, and square grid. Among other trends, we find that while the ladder array leads to substantial efficiencies over the linear array, the advantage of the square over the ladder array is less pronounced. These results are applicable in hardware co-design and in choosing efficient qudit encodings for a given set of near-term quantum hardware. Additionally, this work may be relevant to the scheduling of other quantum algorithms for which matrix exponentiation is a subroutine.
Cloud-accessible quantum processors enable direct execution of quantum algorithms on heterogeneous hardware platforms. Unlike classical systems, however, identical quantum circuits may exhibit substantially different behavior across devices due to architectural variations in qubit connectivity, gate fidelity, and coherence times.
In this work, we systematically benchmark five representative quantum algorithms - Bell state preparation, GHZ state generation, Quantum Fourier Transform (QFT), Grover's Search, and the Quantum Approximate Optimization Algorithm (QAOA) - across trapped-ion, superconducting, and simulator backends using Amazon Braket. Performance metrics including fidelity, CHSH violation, success probability, circuit depth, and gate counts are evaluated.
Our results demonstrate a strong dependence of algorithmic performance on hardware topology and noise characteristics. For example, 10-qubit GHZ states achieved fidelities above 0.8 on trapped-ion hardware, while superconducting platforms dropped below 0.15 due to routing overhead and accumulated two-qubit gate errors. These findings highlight the importance of hardware-aware algorithm selection and provide practical guidance for benchmarking in the NISQ era.
Abstract As the effort to scale up existing quantum hardware proceeds, it becomes necessary to schedule quantum gates in a way that minimizes the number of operations. There are three constraints that have to be satisfied: the order or dependency of the quantum gates in the specific algorithm, the fact that any qubit may be involved in at most one gate at a time, and the restriction that two-qubit gates are implementable only between connected qubits. The last aspect implies that the compilation depends not only on the algorithm, but also on hardware properties like connectivity. Here we suggest a two-step approach in which logical gates are initially scheduled neglecting connectivity considerations, while routing operations are added at a later step in a way that minimizes their overhead. We rephrase the subtasks of gate scheduling in terms of graph problems like edge-coloring and maximum subgraph isomorphism. While this approach is general, we specialize to a one-dimensional array of qubits to propose a routing scheme that is minimal in the number of exchange operations. As a practical application, we schedule the quantum approximate optimization algorithm in a linear geometry and quantify the reduction in the number of gates and circuit depth that results from increasing the efficacy of the scheduling strategies.
The burgeoning field of quantum computing hinges on the efficient execution of quantum algorithms. However, realizing this potential necessitates overcoming significant challenges related to hardware heterogeneity. Current quantum hardware comprises a diverse range of platforms, each possessing unique characteristics – varying qubit connectivity, gate fidelities, and coherence times. A naive approach to scheduling quantum algorithms across these platforms will likely result in suboptimal performance due to the inherent limitations of each device. This work proposes a novel resource-aware scheduling algorithm designed to mitigate these issues. The algorithm dynamically analyzes both the available resources of a quantum hardware platform and the specific algorithmic requirements of a given quantum algorithm. The core of the algorithm involves a cost function that balances resource utilization with algorithmic performance, guiding the selection of the most suitable hardware platform and execution strategy. This approach represents a step towards a more practical and efficient deployment of quantum algorithms, paving the way for leveraging the strengths of diverse quantum computing architectures. The presented method offers a framework for optimizing quantum computation, acknowledging the complex interplay between hardware and algorithm.
As quantum hardware increases in complexity, successful algorithmic execution relies more heavily on awareness of existing device constraints. In this work we focus on the problem of routing quantum information across the machine to overcome the limited connectivity of quantum hardware. Previous approaches address the problem for each two-qubit gate separately and then impose the compatibility of the different routes. Here we shift the focus onto the set of all routing operations that are possible at any given time and favor those that most benefit the global pattern of two-qubit gates. We benchmark our optimization technique by scheduling variational algorithms for transmon chips. Finally we apply our scheduler to the design problem of quantifying the impact of manufacturing decisions. Specifically, we address the number of distinct qubit frequencies in superconducting architectures and how they affect the algorithmic performance of the quantum Fourier transform.
Quantum computing has emerged as a transformative paradigm capable of solving complex computational problems that are intractable for classical computers. Central to the advancement of this technology is the development of efficient quantum algorithms and high fidelity simulations that enable the design, testing, and optimization of quantum solutions before deployment on physical hardware. This study focuses on the design and implementation of quantum algorithms tailored for solving a variety of quantum problems, including quantum chemistry, optimization, and cryptography. Using state of the art simulation platforms such as Qiskit, Cirq, and Pennylane, algorithm performance was evaluated in terms of accuracy, execution time, scalability, and resilience to noise. Benchmarks demonstrate that algorithms such as the Variational Quantum Eigensolver (VQE) and Quantum Approximate Optimization Algorithm (QAOA) achieve significant speedups in problem specific domains, while hybrid quantum–classical methods provide robust pathways for near term quantum advantage. Simulation results reveal that algorithmic efficiency can be significantly improved through optimized circuit depth, qubit connectivity mapping, and advanced error mitigation techniques. The findings highlight the potential of simulation driven quantum algorithm development in accelerating the practical realization of quantum computing applications across disciplines such as materials discovery, molecular modeling, secure communications, and complex optimization tasks.