Recently, the development of quantum chips has made great progress-- the number of qubits is increasing and the fidelity is getting higher. However, qubits of these chips are not always fully connected, which sets additional barriers for implementing quantum algorithms and programming quantum programs. In this paper, we introduce a general circuit optimizing scheme, which can efficiently adjust and optimize quantum circuits according to arbitrary given qubits' layout by adding additional quantum gates, exchanging qubits and merging single-qubit gates. Compared with the optimizing algorithm of IBM's QISKit, the quantum gates consumed by our scheme is 74.7%, and the execution time is only 12.9% on average.
Recently, the development of quantum chips has made great progress-- the number of qubits is increasing and the fidelity is getting higher. However, qubits of these chips are not always fully connected, which sets additional barriers for implementing quantum algorithms and programming quantum programs. In this paper, we introduce a general circuit optimizing scheme, which can efficiently adjust and optimize quantum circuits according to arbitrary given qubits' layout by adding additional quantum gates, exchanging qubits and merging single-qubit gates. Compared with the optimizing algorithm of IBM's QISKit, the quantum gates consumed by our scheme is 74.7%, and the execution time is only 12.9% on average.
For many practical applications, Quantum computers offer major speed-ups over traditional machines. The production of quantum chips has recently made tremendous strides, with the quantity of Qubits increasing and fidelity increasing. The smallest unit of information is the binary digit i.e. bit in general computing. In Quantum Computing the term Qubit (Quantum Bit) is used for the same purpose. In order to differentiate between a classical bit and a Qubit, Bra-Ket or Dirac notation is used. So, the Qubits are represented as |0〉 and |1〉 and are often read as Ket 0 for zero state and Ket 1 for one state. In this paper mainly programming and application sides of Quantum Computing are focused. For that, Qiskit module and its tools are used in Python programming language. General circuit optimization scheme is given. The Quantum circuits with the concept of Quantum Gates implemented are stronger compared to the optimizing algorithm and with faster execution time. In addition, for prime factorization, access to IBM's Quantum computer is carried out successfully.
Quantum computing faces challenges such as noise, short coherence time, and limited qubit connections. These challenges worsen as quantum circuits become more complex. One major issue is the increasing depth of quantum circuits. This research proposes an optimization framework targeting depth and gate count reduction in quantum circuits, specifically for Noisy Intermediate-Scale Quantum (NISQ) devices. The proposed approach combines unitary merging of single-qubit gates, CNOT cancellation, gate commuting, and rotation gate rewriting strategies. Consecutive gates acting on the same qubit, such asRx(θ1)⋅Rx(θ2), are algebraically merged into a single rotation, while pairs of redundant CNOT gates are eliminated based on gate identity relations. The technique is implemented using Qiskit and validated across five diverse circuits including complex, random, and multi-qubit configurations. Experimental results show an average depth reduction of 33.33% and gate count reduction of 32.14%, with runtime improvement of up to 25%. For instance, an input circuit with a depth of 7 and gate count of 11 was reduced to a depth of 2 and 4 gates. All optimized circuits preserve functional correctness with a fidelityF≥0.99. High-resolution circuit diagrams are presented to visually demonstrate improvements before and after optimization. Additionally, global phase shifts such aseiπ/4are preserved or analytically characterized where relevant. This work enhances the viability of quantum computations on near-term hardware and opens pathways for future AI-driven quantum optimizations.
Currently, quantum computing is developing at a high speed because its high parallelism and high computing power bring new solutions to many fields. However, due to chip process technology, it is difficult to achieve full coupling of all qubits on a quantum chip, so when compiling a quantum circuit onto a physical chip, it is necessary to ensure that the two-qubit gate acts on a pair of coupled qubits by inserting swap gates. It will cause great additional cost when a large number of swap gates are inserted, leading to the execution time of quantum circuits longer. In this paper, we designed a way based on the business to insert swap gates BQA(Busy Qubits Avoid). We exploit the imbalance of the number of gates on qubits, trying to hide the overhead of swap gates. At the same time, we also expect swap gates to make as little negative impact on subsequent two-qubit gates as possible. We have designed a heuristic function that can take into account both of these points. Compared with qiskit, the execution time of the circuit optimized by our proposed method is only 0.5 times that of the qiskit compiled circuit. And when the number of two-qubit gates is large, it will achieve higher level than general conditions. This implies higher execution efficiency and lower decoherence error rate.
The recent times of fast development of quantum computers has been followed by many researchers who want to run the larger and more difficult quantum algorithms on it and they have promised such speedup several times. Notwithstanding this, commercial quantum computers are currently fraught with instability and errors. This paper is centered on development of the customized compiler for quantum computing with aid of Qiskit Terra, a QIS framework. We target central classes such as circuit representation structures, programming techniques based on OpenQASM, challenges in the QC architecture, high-level routing optimization, and the structure of the Qiskit Terra compiler. In every circuit, the optimization is provided by methods of Qiskit Terra, including Trivial Layout, Noise Adaptive Layout, Dense Layout, and Custom Layout. These optimization levels address many problems that emerge when circuits are being compiled and executed, and thus, the optimization levels seek to boost circuit efficiency, reduce the count of gates, and enhance the overall performance. The introduction of numerous optimization passes starting from unroller passes that translate gates, the layout passes that map virtual to physical qubits, and the optimization algorithm aimed at the runtime reduction. Modern quantum compilation technologies are being currently developed based on economic (and theoretical) analyses to underpin the investigation and development of optimal quantum computation procedures.
IBM has made several quantum computers available to researchers around the world via cloud services. Two architectures with five qubits, one with 16, and one with 20 qubits are available to run experiments. The IBM architectures implement gates from the Clifford+T gate library. However, each architecture only implements a subset of the possible CNOT gates. In this paper, we show how Clifford+T circuits can efficiently be mapped into the two IBM quantum computers with 5 qubits. We further present an algorithm and a set of circuit identities that may be used to optimize the Clifford+T circuits in terms of gate count and number of levels. It is further shown that the optimized circuits can considerably reduce the gate count and number of levels and thus produce results with better fidelity.
Quantum algorithm design usually assumes access to a perfect quantum computer with ideal properties like full connectivity, noise-freedom, and arbitrarily long coherence time. In noisy intermediate-scale quantum (NISQ) devices, however, the number of qubits is highly limited and quantum operation error and qubit coherence are not negligible. Besides, the connectivity of physical qubits in a quantum processing unit (QPU) is also strictly constrained. Thereby, additional operations like SWAP gates have to be inserted to satisfy this constraint while preserving the functionality of the original circuit. This process is known as quantum circuit transformation. Adding additional gates will increase both the size and depth of a quantum circuit and, therefore, cause further decay of the performance of a quantum circuit. Thus, it is crucial to minimize the number of added gates. In this article, we propose an efficient method to solve this problem. We first choose by using simulated annealing an initial mapping which fits well with the input circuit and then, with the help of a heuristic cost function, stepwise apply the best-selected SWAP gates until all quantum gates in the circuit can be executed. Our algorithm runs in time polynomial in all parameters, including the size and the qubit number of the input circuit, and the qubit number in the QPU. Its space complexity is quadratic to the number of edges in the QPU. The experimental results on extensive realistic circuits confirm that the proposed method is efficient and the number of added gates of our algorithm is, on average, only 57% of that of state-of-the-art algorithms on IBM Q20 (Tokyo), the most recent IBM quantum device.