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arXiv:1712.06550 · Physical Review Letters

Three-Qubit Randomized Benchmarking

David C. McKay, Sarah Sheldon, John A. Smolin, Jerry M. Chow, Jay Gambetta

Published May 23, 2019• 155 citations
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Abstract

As quantum circuits increase in size, it is critical to establish scalable multiqubit fidelity metrics. Here we investigate, for the first time, three-qubit randomized benchmarking (RB) on a quantum device consisting of three fixed-frequency transmon qubits with pairwise microwave-activated interactions (cross-resonance). We measure a three-qubit error per Clifford of 0.106 for all-to-all gate connectivity and 0.207 for linear gate connectivity. Furthermore, by introducing mixed dimensionality simultaneous RB-simultaneous one- and two-qubit RB-we show that the three-qubit errors can be predicted from the one- and two-qubit errors. However, by introducing certain coherent errors to the gates, we can increase the three-qubit error to 0.302, an increase that is not predicted by a proportionate increase in the one- and two-qubit errors from simultaneous RB. This demonstrates the importance of multiqubit metrics, such as three-qubit RB, on evaluating overall device performance.

DOI
10.1103/physrevlett.122.200502

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As quantum circuits increase in size, it is critical to establish scalable multiqubit fidelity metrics. Here we investigate, for the first time, three-qubit randomized benchmarking (RB) on a quantum device consisting of three fixed-frequency transmon qubits with pairwise microwave-activated interactions (cross-resonance). We measure a three-qubit error per Clifford of 0.106 for all-to-all gate connectivity and 0.207 for linear gate connectivity. Furthermore, by introducing mixed dimensionality simultaneous RB-simultaneous one- and two-qubit RB-we show that the three-qubit errors can be predicted from the one- and two-qubit errors. However, by introducing certain coherent errors to the gates, we can increase the three-qubit error to 0.302, an increase that is not predicted by a proportionate increase in the one- and two-qubit errors from simultaneous RB. This demonstrates the importance of multiqubit metrics, such as three-qubit RB, on evaluating overall device performance.
Benchmarking methods that can be adapted to multiqubit systems are essential for assessing the overall or "holistic" performance of nascent quantum processors. The current industry standard is Clifford randomized benchmarking (RB), which measures a single error rate that quantifies overall performance. But, scaling Clifford RB to many qubits is surprisingly hard. It has only been performed on one, two, and three qubits as of this writing. This reflects a fundamental inefficiency in Clifford RB: the n-qubit Clifford gates at its core have to be compiled into large circuits over the one- and two-qubit gates native to a device. As n grows, the quality of these Clifford gates quickly degrades, making Clifford RB impractical at relatively low n. In this Letter, we propose a direct RB protocol that mostly avoids compiling. Instead, it uses random circuits over the native gates in a device, which are seeded by an initial layer of Clifford-like randomization. We demonstrate this protocol experimentally on two to five qubits using the publicly available ibmqx5. We believe this to be the greatest number of qubits holistically benchmarked, and this was achieved on a freely available device without any special tuning up. Our protocol retains the simplicity and convenient properties of Clifford RB: it estimates an error rate from an exponential decay. But, it can be extended to processors with more qubits-we present simulations on 10+ qubits-and it reports a more directly informative and flexible error rate than the one reported by Clifford RB. We show how to use this flexibility to measure separate error rates for distinct sets of gates, and we use this method to estimate the average error rate of a set of cnot gates.
Randomized benchmarking (RB) protocols are the most widely used methods for assessing the performance of quantum gates.However, the existing RB methods either do not scale to many qubits or cannot benchmark a universal gate set.Here, we introduce and demonstrate a technique for scalable RB of many universal and continuously parametrized gate sets, using a class of circuits called randomized mirror circuits.Our technique can be applied to a gate set containing an entangling Clifford gate and the set of arbitrary single-qubit gates, as well as gate sets containing controlled rotations about the Pauli axes.We use our technique to benchmark universal gate sets on four qubits of the Advanced Quantum Testbed, including a gate set containing a controlled-S gate and its inverse, and we investigate how the observed error rate is impacted by the inclusion of non-Clifford gates.Finally, we demonstrate that our technique scales to many qubits with experiments on a 27-qubit IBM Q processor.We use our technique to quantify the impact of crosstalk on this 27-qubit device, and we find that it contributes approximately 2=3 of the total error per gate in random many-qubit circuit layers.
As quantum processors grow, new performance benchmarks are required to capture the full quality of the devices at scale. While quantum volume is an excellent benchmark, it focuses on the highest quality subset of the device and so is unable to indicate the average performance over a large number of connected qubits. Furthermore, it is a discrete pass/fail and so is not reflective of continuous improvements in hardware nor does it provide quantitative direction to large-scale algorithms. For example, there may be value in error mitigated Hamiltonian simulation at scale with devices unable to pass strict quantum volume tests. Here we discuss a scalable benchmark which measures the fidelity of a connecting set of two-qubit gates over NNN qubits by measuring gate errors using simultaneous direct randomized benchmarking in disjoint layers. Our layer fidelity can be easily related to algorithmic run time, via γγγ defined in Ref.\cite{berg2022probabilistic} that can be used to estimate the number of circuits required for error mitigation. The protocol is efficient and obtains all the pair rates in the layered structure. Compared to regular (isolated) RB this approach is sensitive to crosstalk. As an example we measure a N=80 (100)N=80~(100)N=80 (100) qubit layer fidelity on a 127 qubit fixed-coupling "Eagle" processor (ibm\_sherbrooke) of 0.26(0.19) and on the 133 qubit tunable-coupling "Heron" processor (ibm\_montecarlo) of 0.61(0.26). This can easily be expressed as a layer size independent quantity, error per layered gate (EPLG), which is here 1.7×10−2(1.7×10−2)1.7\times10^{-2}(1.7\times10^{-2})1.7×10−2(1.7×10−2) for ibm\_sherbrooke and 6.2×10−3(1.2×10−2)6.2\times10^{-3}(1.2\times10^{-2})6.2×10−3(1.2×10−2) for ibm\_montecarlo.
Native multiqubit parity gates have various potential quantum computing applications, such as entanglement creation, logical state encoding, and parity measurement in quantum error correction. Here, using simultaneous cross-resonance drives on two control qubits with a common target, we demonstrate an efficient implementation of a three-qubit parity gate. We have developed a calibration procedure based on that for the echoed cross-resonance gate. We confirm that our use of simultaneous drives leads to higher interleaved randomized benchmarking fidelities than a naive implementation with two consecutive controlled not gates. We also demonstrate that our simultaneous parity gates can significantly improve the parity measurement error probability for the heavy-hexagon code on an IBM Quantum processor using seven superconducting qubits with all-microwave control.
Ternary quantum processors offer significant potential computational advantages over conventional qubit technologies, leveraging the encoding and processing of quantum information in qutrits (three-level systems). To evaluate and compare the performance of such emerging quantum hardware it is essential to have robust benchmarking methods suitable for a higher-dimensional Hilbert space. We demonstrate extensions of industry standard randomized benchmarking (RB) protocols, developed and used extensively for qubits, suitable for ternary quantum logic. Using a superconducting five-qutrit processor, we find an average single-qutrit process infidelity of 3.8×10^{-3}. Through interleaved RB, we characterize a few relevant gates, and employ simultaneous RB to fully characterize crosstalk errors. Finally, we apply cycle benchmarking to a two-qutrit CSUM gate and obtain a two-qutrit process fidelity of 0.85. Our results present and demonstrate RB-based tools to characterize the performance of a qutrit processor, and a general approach to diagnose control errors in future qudit hardware.
To improve the performance of multi-qubit algorithms on quantum devices it is critical to have methods for characterizing non-local quantum errors such as crosstalk. To address this issue, we propose and test an extension to the analysis of simultaneous randomized benchmarking data -- correlated randomized benchmarking. We fit the decay of correlated polarizations to a composition of fixed-weight depolarizing maps to characterize the locality and weight of crosstalk errors. From these errors we introduce a crosstalk metric which indicates the distance to the closest map with only local errors. We demonstrate this technique experimentally with a four-qubit superconducting device and utilize correlated RB to validate crosstalk reduction when we implement an echo sequence.