Alexis Morvan, Vinay Ramasesh, Machiel Blok, John Mark Kreikebaum, Kevin P. O’Brien, Larry Chen, Bradley Mitchell, Ravi Naik, David Santiago, Irfan A. Siddiqi
Ternary quantum processors offer significant potential computational advantages over conventional qubit technologies, leveraging the encoding and processing of quantum information in qutrits (three-level systems). To evaluate and compare the performance of such emerging quantum hardware it is essential to have robust benchmarking methods suitable for a higher-dimensional Hilbert space. We demonstrate extensions of industry standard randomized benchmarking (RB) protocols, developed and used extensively for qubits, suitable for ternary quantum logic. Using a superconducting five-qutrit processor, we find an average single-qutrit process infidelity of 3.8×10^{-3}. Through interleaved RB, we characterize a few relevant gates, and employ simultaneous RB to fully characterize crosstalk errors. Finally, we apply cycle benchmarking to a two-qutrit CSUM gate and obtain a two-qutrit process fidelity of 0.85. Our results present and demonstrate RB-based tools to characterize the performance of a qutrit processor, and a general approach to diagnose control errors in future qudit hardware.
Ternary quantum processors offer significant potential computational advantages over conventional qubit technologies, leveraging the encoding and processing of quantum information in qutrits (three-level systems). To evaluate and compare the performance of such emerging quantum hardware it is essential to have robust benchmarking methods suitable for a higher-dimensional Hilbert space. We demonstrate extensions of industry standard randomized benchmarking (RB) protocols, developed and used extensively for qubits, suitable for ternary quantum logic. Using a superconducting five-qutrit processor, we find an average single-qutrit process infidelity of 3.8×10^{-3}. Through interleaved RB, we characterize a few relevant gates, and employ simultaneous RB to fully characterize crosstalk errors. Finally, we apply cycle benchmarking to a two-qutrit CSUM gate and obtain a two-qutrit process fidelity of 0.85. Our results present and demonstrate RB-based tools to characterize the performance of a qutrit processor, and a general approach to diagnose control errors in future qudit hardware.
Superconducting devices have emerged as leading candidates for building practical quantum computers, owing to their scalability, designability, and ease of control. Development of superconducting devices has been accompanied by increases in coherence times from nanoseconds to tens of microseconds, and a multitude of new types of superconducting qubits. In turn, these improvements in coherence, and study of superconducting qubits has produced models for these devices accurate and trustworthy enough to enable design decisions to be determined prior to device fabrication. Recent work by the superconducting quantum devices (SQD) group has produced a variant of the capacitively-shunted flux qubit that features fast control over the lowest three levels, allowing the device to be used as a qutrit. This thesis presents a model and characterization results for this device. \n \nThis thesis also presents experimental results characterizing control fidelity for a qutrit using randomized benchmarking (RB). Quantum process tomography and application of repeated gate sequences are also used to support the randomized benchmarking results. The method of synthesizing the gates in the qutrit Clifford group can decompose any gate into two-state rotations. The fidelity of 99.0 +/- 0.2% obtained by randomized benchmarking establishes the device as a useful qutrit, and outlines interesting directions in using higher levels to improve qubit-based quantum computers, and in using higher levels to pack more states into fewer devices in quantum computers. Analysis of experimental results indicates errors are dominated by ac-Stark and Bloch-Siegert shifts during qutrit control. \n \nThis thesis then presents two new devices meant to study the impact of changing design parameters on the suitability of flux qubits for multilevel control. The first device test individual qubits, with the goal of further improving the coherence time, and improving qutrit control. The second device couples two devices together, so that two-qubit gates can be studied. The available design parameters and their impact on qubit properties are discussed, and design variations are selected for the single and two-qubit devices. The result is a set of devices ready for manufacture and experimental characterization.
Benchmarking methods that can be adapted to multiqubit systems are essential for assessing the overall or "holistic" performance of nascent quantum processors. The current industry standard is Clifford randomized benchmarking (RB), which measures a single error rate that quantifies overall performance. But, scaling Clifford RB to many qubits is surprisingly hard. It has only been performed on one, two, and three qubits as of this writing. This reflects a fundamental inefficiency in Clifford RB: the n-qubit Clifford gates at its core have to be compiled into large circuits over the one- and two-qubit gates native to a device. As n grows, the quality of these Clifford gates quickly degrades, making Clifford RB impractical at relatively low n. In this Letter, we propose a direct RB protocol that mostly avoids compiling. Instead, it uses random circuits over the native gates in a device, which are seeded by an initial layer of Clifford-like randomization. We demonstrate this protocol experimentally on two to five qubits using the publicly available ibmqx5. We believe this to be the greatest number of qubits holistically benchmarked, and this was achieved on a freely available device without any special tuning up. Our protocol retains the simplicity and convenient properties of Clifford RB: it estimates an error rate from an exponential decay. But, it can be extended to processors with more qubits-we present simulations on 10+ qubits-and it reports a more directly informative and flexible error rate than the one reported by Clifford RB. We show how to use this flexibility to measure separate error rates for distinct sets of gates, and we use this method to estimate the average error rate of a set of cnot gates.
Quantum computers have the potential to bring about a new age of technology, but in order for them to become a reality, the elephant in the room must be addressed, quantum errors. The complexity of quantum errors grows exponentially as the system size is increased; scalable characterization protocols which work under physically realistic noise are therefore needed to assess and optimize control. \n \nRandomized Benchmarking (RB) is a family of characterization protocols with the requisite qualities. RB protocols are independent of state preparation and measurement (SPAM) errors, and because they extract partial information about the error profiles in the form of figures of merit, they are scalable in the number of qubits. In this thesis, we study these figures of merit under various error models, gate-sets, and sample distributions, to further our understanding of their physical meaning, and to fine-tune the best practice for diagnosing errors in basic gate-sets. \n \nThe first study presented in this thesis looks at the physical meaning of the unitarity under physically realistic gate-dependent noise. Numerically, we demonstrate that under these realistic noise models, the unitarity obtained via Extended RB (XRB) overlaps strongly with the average of the unitarity of the errors over the set of individual operations. \n \nThe second study numerically and analytically proves that the Standard RB (SRB) decay parameter p coincides with the decay parameter of the novel figure of merit gate-set circuit fidelity. We also prove that, in the limit of high-fidelity single-qubit experiments, the disconnect between the average gate fidelity and SRB experimental results is caused by a basis mismatch between the gates and the state-preparation and measurement procedures. \n \nIn the third part of this thesis, we compare the results of two variations of the SRB protocol, one that samples uniformly (SRB) and one that samples non-uniformly (NIST RB) from the Clifford group. We prove that NIST RB produces an exponential fidelity curve that gives different infidelity results than SRB. \n \nThe fourth and final study gives a standard for assessing basic gate-sets. Experimental results are given from the assessment run on super-conducting and ion-trap devices. We also experimentally show how the systematic error bounds can be tightened by accounting for the error's degree of coherence, as well as using weaker randomizing sets.
One of the main challenges in building a quantum processor is to characterize the environmental noise. Noise characterization can be achieved by exploiting different techniques, such as randomization where several sequences of random quantum gates are applied to the qubit under test to derive statistical characteristics about the affecting noises. A scalable and robust algorithm able to benchmark the full set of Clifford gates using randomization techniques is called randomized benchmarking. In this study, we simulated randomized benchmarking protocols in a semiconducting all-electrical three-electron double-quantum dot qubit, i.e. hybrid qubit, under different error models, that include quasi-static Gaussian and the more realistic 1/f noise model, for the input controls. The average error of specific quantum computational gates is extracted through interleaved randomized benchmarking obtained including Clifford gates between the gate of interest. It provides an estimate of the fidelity as well as theoretical bounds for the average error of the gate under test.
Accurate benchmarking of quantum gates is crucial for understanding and enhancing the performance of quantum hardware. A standard method for this is interleaved benchmarking, a technique which estimates the error on an interleaved target gate by comparing cumulative error rates of randomized sequences implemented with the interleaved gate and without it. In this work, we show both numerically and experimentally that the standard approach of interleaved randomized benchmarking (IRB), which uses the multi-qubit Clifford group for randomization, can produce highly inaccurate and even physically impossible estimates for the error on the interleaved gate in the presence of coherent errors. Fortunately we also show that interleaved benchmarking performed with cycle benchmarking, which randomizes with single qubit Pauli gates, provides dramatically reduced systematic uncertainty relative to standard IRB, and further provides as host of additional benefits including data reusability. We support our conclusions with a theoretical framework for bounding systematic errors, extensive numerical results comparing a range of interleaved protocols under fixed resource costs, and experimental demonstrations on three quantum computing platforms.
Benchmarking noise in quantum gates is crucial for developing dependable quantum computers, as noise directly affects gate fidelity and computational accuracy. Randomized benchmarking (RB) protocols, which evaluate performance through random gate sequences, provide a reliable way to quantify average error rates due to their scalability and robustness in averaging out complex, device-specific noise. In this talk, we will discuss several variants of randomized benchmarking protocols including an overview of our recent work in this area.