As the size of quantum systems becomes bigger, more complicated hardware is required to control these systems. In order to reduce the complexity, I discuss the amount of parallelism required for a fault-tolerant quantum computer and what computation speed can be achieved in different architectures. To build a large-scale quantum computer, one can use architectural principles, from classical computer architecture, like multiplexing or pipelining. In this document, a Quantum von Neumann architecture is introduced which uses specialized hardware for the different tasks of a quantum computer, like computation or storage. Furthermore, it requires long qubit coherence and the capability to move quantum information between the different parts of the quantum computer. As an example, a Quantum von Neumann architecture for trapped ions is presented which incorporates multiplexing in the memory region for large-scale quantum computation. To illustrate the capability of this architecture, a model trapped ion quantum computer based on Quantum von Neumann architecture, the Quantum 4004, is introduced. Its hardware is optimized for simplicity and uses the classical Intel 4004 CPU from 1971 as a blueprint. The Quantum 4004 has only a single processing zone and is structured in 4 qubit packages. Its quantum memory can store up to 32768 qubit ions and its computation speed is 10 $μ$s for single qubit operations and 20 $μ$s for two-qubit operations.
As the size of quantum systems becomes bigger, more complicated hardware is required to control these systems. In order to reduce the complexity, I discuss the amount of parallelism required for a fault-tolerant quantum computer and what computation speed can be achieved in different architectures. To build a large-scale quantum computer, one can use architectural principles, from classical computer architecture, like multiplexing or pipelining. In this document, a Quantum von Neumann architecture is introduced which uses specialized hardware for the different tasks of a quantum computer, like computation or storage. Furthermore, it requires long qubit coherence and the capability to move quantum information between the different parts of the quantum computer. As an example, a Quantum von Neumann architecture for trapped ions is presented which incorporates multiplexing in the memory region for large-scale quantum computation. To illustrate the capability of this architecture, a model trapped ion quantum computer based on Quantum von Neumann architecture, the Quantum 4004, is introduced. Its hardware is optimized for simplicity and uses the classical Intel 4004 CPU from 1971 as a blueprint. The Quantum 4004 has only a single processing zone and is structured in 4 qubit packages. Its quantum memory can store up to 32768 qubit ions and its computation speed is 10 μs for single qubit operations and 20 μs for two-qubit operations.
Quantum computing is an emerging field that offers revolutionary and exciting new ways to process, store, and transport information. Moreover, realizing large-scale quantum systems requires advances in science and engineering that are now very close to reality. Such systems will need many classical and quantum parts that must fit together into one architecture, in which each component plays an integral role over the course of an application execution. Therefore, it is important that we draw upon the experiences gained from traditional architectures, to develop a model for a large-scale quantum system that provides the methodology necessary for the many different components to work together.
In this thesis, I describe the design of the Quantum Logic Array (QLA) architecture, which tackles critical scalability issues such as the cost of error correction and distributing data over large-distances. To accurately model the performance of the QLA architecture—the ion-trap technology is used since every component necessary for universal quantum computation has been demonstrated in the laboratory. However, due to its design approach for maximizing parallelism, the QLA system suffers from large area overhead. To combat the area problem, I describe an architecture that uses the concept of hardware specialization employed in traditional architectures. The new architecture is based on the QLA model, but is divided into separately optimized quantum memory hierarchy and logic specific regions. The result is a scalable system design that exploits the available parallelism to balance both quantum and classical resources, while both reducing the area of the chip and increasing its performance.
This paper proposes a novel approach to quantum computing hardware that diverges from the traditional Von Neumann architecture. The core argument centers around leveraging quantum entanglement and superposition for inherent parallel computation, addressing limitations inherent in the conventional model. We introduce a heterogeneous quantum computing architecture built upon quantum bits (qubits) and quantum circuits, designed to facilitate data processing and control through orchestrated quantum operations. The fundamental innovation lies in moving away from the sequential processing paradigm dictated by Von Neumann architecture, offering a potentially more efficient hardware platform for quantum computations. This architecture aims to unlock significant computational speedups by exploiting the quantum mechanical properties of superposition and entanglement, moving beyond the constraints of classical bit manipulation. The design incorporates a novel control system and qubit connectivity model to maximize computational parallelism. This research contributes to the exploration of alternative hardware designs critical for the advancement of scalable and performant quantum computing systems.
Abstract A modern computer system, based on the von Neumann architecture, is a complicated system with several interactive modular parts. It requires a thorough understanding of the physics of information storage, processing, protection, readout, etc. Quantum computing, as the most generic usage of quantum information, follows a hybrid architecture so far, namely, quantum algorithms are stored and controlled classically, and mainly the executions of them are quantum, leading to the so-called quantum processing units. Such a quantum–classical hybrid is constrained by its classical ingredients, and cannot reveal the computational power of a fully quantum computer system as conceived from the beginning of the field. Recently, the nature of quantum information has been further recognized, such as the no-programming and no-control theorems, and the unifying understandings of quantum algorithms and computing models. As a result, in this work, we propose a model of a universal quantum computer system, the quantum version of the von Neumann architecture. It uses ebits (i.e. Bell states) as elements of the quantum memory unit, and qubits as elements of the quantum control unit and processing unit. As a digital quantum system, its global configurations can be viewed as tensor-network states. Its universality is proved by the capability to execute quantum algorithms based on a program composition scheme via a universal quantum gate teleportation. It is also protected by the uncertainty principle, the fundamental law of quantum information, making it quantum-secure and distinct from the classical case. In particular, we introduce a few variants of quantum circuits, including the tailed, nested, and topological ones, to characterize the roles of quantum memory and control, which could also be of independent interest in other contexts. In all, our primary study demonstrates the manifold power of quantum information and paves the way for the creation of quantum computer systems in the near future.
The practical construction of scalable quantum-computer hardware capable of executing nontrivial quantum algorithms will require the juxtaposition of different types of quantum systems. We analyze a modular ion trap quantum-computer architecture with a hierarchy of interactions that can scale to very large numbers of qubits. Local entangling quantum gates between qubit memories within a single register are accomplished using natural interactions between the qubits, and entanglement between separate registers is completed via a probabilistic photonic interface between qubits in different registers, even over large distances. We show that this architecture can be made fault tolerant, and demonstrate its viability for fault-tolerant execution of modest size quantum circuits.
We propose a fault-tolerant quantum computer architecture for trapped-ion devices, which we call the walking cat architecture. Our blueprint includes a compiler, a detailed description of all the quantum error-correction protocols, a micro-architecture, a sufficiently fast decoder, and thorough simulations. The backbone of the architecture is a cat factory, producing cat states distributed throughout the machine, which are consumed to perform logical operations. The walking cat architecture is based entirely on a modern quantum error-correction approach called low-density parity-check (LDPC) codes.
We identify promising instances of the walking cat architecture, such as (1) a simple architecture based on a single LDPC code, (2) a fast architecture based on fast logical gates relying on a [[70, 6, 9]] code, equipped with Clifford-frame tracking for any 6-qubit Clifford gate, and (3) a dense architecture based on a [[102, 22, 9]]] code encoding 22 logical qubits per memory block. Our dense architecture provides a design with 110 logical qubits executing about one million T gates per day using only 2,514 physical qubits. We estimate that the quantum Hamiltonian simulation of a Heisenberg model on 100 sites can be executed within one month with 10,000 physical qubits, including all shots required to achieve chemical accuracy, suggesting that such a device could enter the regime of classically intractable physics simulations.
Our design relies on hardware components that have been experimentally demonstrated on small devices. We emphasize simplicity over hypothetical performance to facilitate the practical realization of this machine. Based on this approach, we believe that a fault-tolerant quantum computer with hundreds of logical qubits capable of running millions of logical gates can be built in the near term, providing a platform to explore a broad range of applications.
A full-scale quantum computer would work like the standard desktop computer, in that it would have a place to store data, a place where a program manipulates the data, and interconnections to move the data from one to the other. In the computer you are using now, bits of data - stored as quantity of charge or its absence - are transferred from memory to a processor in the form of levels of voltage. At the processor the computer's program determines which logic operations the bits will be subjected to. Once the logic operations are completed, the bits are converted to amounts of charge and stored in memory again. Similarly, in an ion-trap computer, stored qubits would be called from a storage trap to a logic trap, the kind we've been building so far. The two traps would be connected by a long trap that acts like an interconnect or a data bus. It sounds simple, but such a structure would have to be repeated and connected many dozens of times on the same chip to handle the number of ions we'd need. Therefore, a quantum computer equivalent of very-large-scale integration would be required to handle the control circuitry just to move the ions around. The small-scale quantum algorithms that scientists are running today and plan to run in the near future will almost certainly lead to insights that could make full-scale quantum computing, if not easy, at least more tractable.