Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Log inSign up
Challenges
Datasets
Workspaces
Papers
Discussions
Leaderboard
Blog
Job Board
Q3AS

© 2026 Aqora Quantum S.A.S.

TermsPrivacyLegal Notice

arXiv:1701.03262 · Review of Scientific Instruments

An integrated device with high performance multi-function generators and time-to-digital convertors

Xi Qin, Zhifu Shi, Yijin Xie, Lin Wang, Xing Rong, Wenfei Jia, Wenzhe Zhang, Jiangfeng Du

Published Jan 1, 2017• 22 citations
arXivHTMLPDF

Abstract

A highly integrated, high performance, and re-configurable device, which is designed for the Nitrogen-Vacancy (N-V) center based quantum applications, is reported. The digital compartment of the device is fully implemented in a Field-Programmable-Gate-Array (FPGA). The digital compartment is designed to manage the multi-function digital waveform generation and the time-to-digital convertors. The device provides two arbitrary-waveform-generator channels which operate at a 1 Gsps sampling rate with a maximum bandwidth of 500 MHz. There are twelve pulse channels integrated in the device with a 50 ps time resolution in both duration and delay. The pulse channels operate with the 3.3 V transistor-transistor logic. The FPGA-based time-to-digital convertor provides a 23-ps time measurement precision. A data accumulation module, which can record the input count rate and the distributions of the time measurement, is also available. A digital-to-analog convertor board is implemented as the analog compartment, which converts the digital waveforms to analog signals with 500 MHz lowpass filters. All the input and output channels of the device are equipped with 50 Ω SubMiniature version A termination. The hardware design is modularized thus it can be easily upgraded with compatible components. The device is suitable to be applied in the quantum technologies based on the N-V centers, as well as in other quantum solid state systems, such as quantum dots, phosphorus doped in silicon, and defect spins in silicon carbide.

DOI
10.1063/1.4973725

Related papers

A Hybrid Analog-Digital Programmable Pulse Generator for QIST

Soumyajit Mandal, Kayla Hernandez, Joanna M. Zajac

Fast FPGA-based arbitrary waveform generators (AWGs) are crucial for both quantum information science and technology (QIST) and classical communications. However, commonly used FPGA boards are limited to operating ranges of hundreds of MHz while tens of GHz are required. Consequently, more work is needed to bridge this gap. This paper describes a programmable analog-digital pulse generator that combines a FPGA board, which is used as multi-channel arbitrary digital pattern generator in the GHz range, with a custom analog pulse generator. A pulse generator board based on step recovery diodes (SRDs) is shown to generate output pulses with nominal durations as short as 75 ps. An integrated pulse generator in 28 nm CMOS technology is also designed to obtain higher repetition rates (up to several G H z) and shorter pulse durations (15 ps).

IEEE International Midwest Symposium on Circuits and Systems (MWSCAS)•Aug 10, 2025•0 citations

An FPGA-Based Low Latency AWG for Superconducting Quantum Computers

Yuchen Yang, Zhongtao Shen, Xing Zhu +3 more

This paper reports the development of a low-latency arbitrary waveform generator (AWG), which is suitable for the control and measurement of superconducting quantum computers. It can generate qubit control signals and measurement signals in real time. Compared with commercial AWG, our AWG has less latency and higher analog bandwidth. Compressing latency can reduce system feedback time, and higher analog bandwidth improves the system's integration by mounting more qubits on the readout line. The AWG integrates four high-speed digital-to-analog converters (DACs), phase-locked loop (PLL) circuits, field-programmable gate arrays (FPGAs), and related circuits into a standard PXI 3U board. The waveform generator module, communication interface module, clock module, and configuration module are realized utilizing the FPGA. The FPGA-based hardware architecture enables AWG to be flexibly configured to meet the various needs of quantum experiments. The four-channel AWG has a 2-GSa/s sampling rate, a 14-bit resolution, and 500 MHz bandwidth. The jitter in the AWG output waveform is approximately 3 ps; the latency of the AWG (the time from the feedback trigger received until a feedback pulse is generated) is approximately 55 ns. These designs form the basis of realizing control system for large-scale quantum computing.

IEEE International Instrumentation and Measurement Technology Conference•May 17, 2021•5 citations

An field programmable gate array (FPGA)-based device for charge-state readout of nitrogen-vacancy (NV) center in diamond with nanosecond feedback speed

Runchuan Ye, Yunpeng Zhai, Yushan Liu +2 more

Ionization of nitrogen-vacancy (NV) center in diamond from the NV− to NV0 state is a destructive process in applications, where a large amount of time is cost for high-fidelity readout. To this end, real-time adaptive feedback would be helpful to improve the readout efficiency. Here, we develop a field programmable gate array-based device that supports complex calculation and real-time feedback at the nanosecond level. This device integrates a time tagger for photon input, a programmable logic arrays for real-time calculation, and a 20-channel pulse streamer for control output. Based on this device, we demonstrate a high-efficiency of real-time charge-state readout. With this device, the signal-to-noise ratio of maximal adaptive-decision-based charge-state readout can be significantly reduced. Moreover, we demonstrate an application of NV− purification with the real-time feedback, where the contrast of spin-state-dependent fluorescence is improved from 31.7% to 35.0%. The device can be easily extended to other quantum systems.

AIP Advances•Nov 1, 2023•0 citations

FPGA based hardware platform for trapped-ion-based multi-level quantum systems

Ming-Dong 明东 Zhu 朱, Lin 林 Yan 闫, Xi Qin +3 more

We report a design and implementation of a field-programmable-gate-arrays (FPGA) based hardware platform, which is used to realize control and signal readout of trapped-ion-based multi-level quantum systems. This platform integrates a four-channel 2.8 Gsps@14 bits arbitrary waveform generator, a 16-channel 1 Gsps@14 bits direct-digital-synthesis-based radio-frequency generator, a 16-channel 8 ns resolution pulse generator, a 10-channel 16 bits digital-to-analog-converter module, and a 2-channel proportion integration differentiation controller. The hardware platform can be applied in the trapped-ion-based multi-level quantum systems, enabling quantum control of multi-level quantum system and high-dimensional quantum simulation. The platform is scalable and more channels for control and signal readout can be implemented by utilizing more parallel duplications of the hardware. The hardware platform also has a bright future to be applied in scaled trapped-ion-based quantum systems.

Chinese Physics B•Apr 7, 2023•5 citations

High Performance and Scalable AWG for Superconducting Quantum Computing

Jin Lin, Futian Liang, Yu Xu +4 more

Superconducting quantum computer is manufactured based on semiconductor process which makes qubits integration possible. At the same time, this kind of qubit exhibits high performance fidelity, de-coherence time, scalability and requires a programmable arbitrary waveform generator (AWG). This paper presents implementation of an AWG which composed of two gigabit samples per second (GSPS) sampling rate, 16 bit vertical resolution digital to analog converters (DACs). The AWG integrated with separate microwave devices onto a metal plate for the scale-up consideration. A special waveform sequence output controller is designed to realize seamless waveform switching and arbitrary waveform generator. The jitter in multiple AWG channels is around 10ps, Integral nonlinearity (INL) as well as differential nonlinearity (DNL) is about 2 LSB, and the qubit performance of the de-coherence time (T2*) achieved 33% promotion over that of a commercial 1 GSPS, 14 bit AWG.

arXiv:1806.03660•Jun 10, 2018•4 citations

Hardware for multi-superconducting qubit control and readout*

Zhan Wang, Hai Yang Yu, Rongli Liu +7 more

We have developed an electronic hardware system for the control and readout of multi-superconducting qubit devices. The hardware system is based on the design ideas of good scalability, high synchronization and low latency. The system, housed inside a VPX-6U chassis, includes multiple arbitrary-waveform generator (AWG) channels, analog-digital-converter (ADC) channels as well as direct current source channels. The system can be used for the control and readout of up to twelve superconducting transmon qubits in one chassis, and control and readout of more and more qubit can be carried out by interconnecting the chassis. By using field programmable gate array (FPGA) processors, the system incorporates three features that are specifically useful for superconducting qubit research. Firstly, qubit signals can be processed using the on-board FPGA after being acquired by ADCs, significantly reducing data processing time and data amount for storage and transmission. Secondly, different output modes, such as direct output and sequential output modes, of AWG can be implemented with pre-encoded FPGA. Thirdly, with data acquisition ADCs and controlAWGs jointly controlled by the same FPGA, the feedback latency can be reduced, and in ourtest a 178.4 ns latency time is realized. This is very useful for future quantum feedback experiments. Finally, we demonstrate the functionality of the system by applying the system to the control and readout of a 10 qubit superconducting quantum processor.

Chinese Physics B•May 24, 2021•6 citations
A highly integrated, high performance, and re-configurable device, which is designed for the Nitrogen-Vacancy (N-V) center based quantum applications, is reported. The digital compartment of the device is fully implemented in a Field-Programmable-Gate-Array (FPGA). The digital compartment is designed to manage the multi-function digital waveform generation and the time-to-digital convertors. The device provides two arbitrary-waveform-generator channels which operate at a 1 Gsps sampling rate with a maximum bandwidth of 500 MHz. There are twelve pulse channels integrated in the device with a 50 ps time resolution in both duration and delay. The pulse channels operate with the 3.3 V transistor-transistor logic. The FPGA-based time-to-digital convertor provides a 23-ps time measurement precision. A data accumulation module, which can record the input count rate and the distributions of the time measurement, is also available. A digital-to-analog convertor board is implemented as the analog compartment, which converts the digital waveforms to analog signals with 500 MHz lowpass filters. All the input and output channels of the device are equipped with 50 Ω SubMiniature version A termination. The hardware design is modularized thus it can be easily upgraded with compatible components. The device is suitable to be applied in the quantum technologies based on the N-V centers, as well as in other quantum solid state systems, such as quantum dots, phosphorus doped in silicon, and defect spins in silicon carbide.
Fast FPGA-based arbitrary waveform generators (AWGs) are crucial for both quantum information science and technology (QIST) and classical communications. However, commonly used FPGA boards are limited to operating ranges of hundreds of MHz while tens of GHz are required. Consequently, more work is needed to bridge this gap. This paper describes a programmable analog-digital pulse generator that combines a FPGA board, which is used as multi-channel arbitrary digital pattern generator in the GHz range, with a custom analog pulse generator. A pulse generator board based on step recovery diodes (SRDs) is shown to generate output pulses with nominal durations as short as 75 ps. An integrated pulse generator in 28 nm CMOS technology is also designed to obtain higher repetition rates (up to several G H z) and shorter pulse durations (15 ps).
This paper reports the development of a low-latency arbitrary waveform generator (AWG), which is suitable for the control and measurement of superconducting quantum computers. It can generate qubit control signals and measurement signals in real time. Compared with commercial AWG, our AWG has less latency and higher analog bandwidth. Compressing latency can reduce system feedback time, and higher analog bandwidth improves the system's integration by mounting more qubits on the readout line. The AWG integrates four high-speed digital-to-analog converters (DACs), phase-locked loop (PLL) circuits, field-programmable gate arrays (FPGAs), and related circuits into a standard PXI 3U board. The waveform generator module, communication interface module, clock module, and configuration module are realized utilizing the FPGA. The FPGA-based hardware architecture enables AWG to be flexibly configured to meet the various needs of quantum experiments. The four-channel AWG has a 2-GSa/s sampling rate, a 14-bit resolution, and 500 MHz bandwidth. The jitter in the AWG output waveform is approximately 3 ps; the latency of the AWG (the time from the feedback trigger received until a feedback pulse is generated) is approximately 55 ns. These designs form the basis of realizing control system for large-scale quantum computing.
Ionization of nitrogen-vacancy (NV) center in diamond from the NV− to NV0 state is a destructive process in applications, where a large amount of time is cost for high-fidelity readout. To this end, real-time adaptive feedback would be helpful to improve the readout efficiency. Here, we develop a field programmable gate array-based device that supports complex calculation and real-time feedback at the nanosecond level. This device integrates a time tagger for photon input, a programmable logic arrays for real-time calculation, and a 20-channel pulse streamer for control output. Based on this device, we demonstrate a high-efficiency of real-time charge-state readout. With this device, the signal-to-noise ratio of maximal adaptive-decision-based charge-state readout can be significantly reduced. Moreover, we demonstrate an application of NV− purification with the real-time feedback, where the contrast of spin-state-dependent fluorescence is improved from 31.7% to 35.0%. The device can be easily extended to other quantum systems.
We report a design and implementation of a field-programmable-gate-arrays (FPGA) based hardware platform, which is used to realize control and signal readout of trapped-ion-based multi-level quantum systems. This platform integrates a four-channel 2.8 Gsps@14 bits arbitrary waveform generator, a 16-channel 1 Gsps@14 bits direct-digital-synthesis-based radio-frequency generator, a 16-channel 8 ns resolution pulse generator, a 10-channel 16 bits digital-to-analog-converter module, and a 2-channel proportion integration differentiation controller. The hardware platform can be applied in the trapped-ion-based multi-level quantum systems, enabling quantum control of multi-level quantum system and high-dimensional quantum simulation. The platform is scalable and more channels for control and signal readout can be implemented by utilizing more parallel duplications of the hardware. The hardware platform also has a bright future to be applied in scaled trapped-ion-based quantum systems.
Superconducting quantum computer is manufactured based on semiconductor process which makes qubits integration possible. At the same time, this kind of qubit exhibits high performance fidelity, de-coherence time, scalability and requires a programmable arbitrary waveform generator (AWG). This paper presents implementation of an AWG which composed of two gigabit samples per second (GSPS) sampling rate, 16 bit vertical resolution digital to analog converters (DACs). The AWG integrated with separate microwave devices onto a metal plate for the scale-up consideration. A special waveform sequence output controller is designed to realize seamless waveform switching and arbitrary waveform generator. The jitter in multiple AWG channels is around 10ps, Integral nonlinearity (INL) as well as differential nonlinearity (DNL) is about 2 LSB, and the qubit performance of the de-coherence time (T2*) achieved 33% promotion over that of a commercial 1 GSPS, 14 bit AWG.
We have developed an electronic hardware system for the control and readout of multi-superconducting qubit devices. The hardware system is based on the design ideas of good scalability, high synchronization and low latency. The system, housed inside a VPX-6U chassis, includes multiple arbitrary-waveform generator (AWG) channels, analog-digital-converter (ADC) channels as well as direct current source channels. The system can be used for the control and readout of up to twelve superconducting transmon qubits in one chassis, and control and readout of more and more qubit can be carried out by interconnecting the chassis. By using field programmable gate array (FPGA) processors, the system incorporates three features that are specifically useful for superconducting qubit research. Firstly, qubit signals can be processed using the on-board FPGA after being acquired by ADCs, significantly reducing data processing time and data amount for storage and transmission. Secondly, different output modes, such as direct output and sequential output modes, of AWG can be implemented with pre-encoded FPGA. Thirdly, with data acquisition ADCs and controlAWGs jointly controlled by the same FPGA, the feedback latency can be reduced, and in ourtest a 178.4 ns latency time is realized. This is very useful for future quantum feedback experiments. Finally, we demonstrate the functionality of the system by applying the system to the control and readout of a 10 qubit superconducting quantum processor.