Fault-tolerant quantum computation has been a long-standing goal in many fields of physics. A new model shows how logical qubits can be encoded using anyon excitations from Majorana fermions arranged on a two-dimensional lattice.
Surface codes represent a promising route towards universal fault-tolerant quantum computation, allowing for the protection of stored quantum states against many types of errors. This theoretical work shows that, in addition, a significantly enhanced versatility in quantum information processing is expected when qubits are encoded into the Majorana bound states in topological superconductor-semiconductor heterostructures. In view of recent experimental evidence for Majorana states in such heterostructures, a two-dimensional network of interacting Majorana states thus may feature key advantages towards the long-term goal of a functional quantum computer. The authors discuss how topologically protected logical qubits in this Majorana surface code architecture can be defined, initialized, manipulated, and read out. The physical ingredients needed to implement such operations are familiar from topologically trivial quantum devices. In particular, by employing quantum interference terms in conductance measurements, composite single-electron pumping protocols, and gate-tunable tunnel barriers, the full set of gates required for universal quantum computation can be implemented.
An important approach to fault-tolerant quantum computation is protecting logical information using quantum error correction. Usually, logical information is in the form of logical qubits, which are encoded in physical qubits using quantum error correction codes. Compared with qubit quantum computation, fermionic quantum computation has advantages in quantum simulations of fermionic systems, e.g., molecules. In this paper, we show that fermionic quantum computation can be universal and fault tolerant if we encode logical Majorana fermions in physical Majorana fermions. We take a color code as an example to demonstrate the universal set of fault-tolerant operations on logical Majorana fermions, and we numerically find that the fault-tolerance threshold is about 0.8.
We show how to absorb fermionic quantum simulation's expensive fermion-to-qubit mapping overhead into the overhead already incurred by surface-code-based fault-tolerant quantum computing. The key idea is to process information in surface-code twist defects, which behave like logical Majorana fermions. Our approach encodes Dirac fermions, a key data type for simulation applications, directly into logical Majorana fermions rather than atop a logical qubit layer in the architecture. Using quantum simulation of the N-fermion 2D Fermi-Hubbard model as an exemplar, we demonstrate two immediate algorithmic improvements. First, by preserving the model's locality at the logical level, we reduce the asymptotic Trotter-Suzuki quantum circuit depth from O(N) in a typical Jordan-Wigner encoding to O(1) in our encoding. Second, by exploiting optimizations manifest for logical fermions but less obvious for logical qubits, we reduce the T-count of the block-encoding \textsc{select} oracle by 20\% over standard implementations, even when realized by logical qubits and not logical fermions.
Majorana zero modes (MZMs) are promising candidates for topologically-protected quantum computing hardware, however their large-scale use will likely require quantum error correction. Majorana surface codes (MSCs) have been proposed to achieve this. However, many MSC properties remain unexplored. We present a unified framework for MSC "twist defects" – anyon-like objects encoding quantum information. We show that twist defects in MSCs can encode twice the amount of topologically protected information as in qubit-based codes or other MSC encoding schemes. This is due to twists encoding both logical qubits and "logical MZMs," with the latter enhancing the protection microscopic MZMs can offer. We explain how to perform universal computation with logical qubits and logical MZMs while potentially using far fewer resources than in other MSC schemes. All Clifford gates can be implemented on logical qubits by braiding twist defects. We introduce lattice-surgery-based techniques for computing with logical MZMs and logical qubits, achieving the effect of Clifford gates with zero time overhead. We also show that logical MZMs may result in improved spatial overheads for sufficiently low rates of quasi-particle poisoning. Finally, we introduce a novel MSC analogue of transversal gates that achieves encoded Clifford gates in small codes by braiding microscopic MZMs. MSC twist defects thus open new paths towards fault-tolerant quantum computation.
Quantum computers are devices that can solve certain problems faster than ordinary, classical computers. The fundamental units of quantum information are qubits, superpositions of two states, a "zero" state and a "one" state. There are various approaches to construct such two-level systems, among others, using superconducting circuits, trapped ions or photons. A common feature of these physical systems is that their coherence times are relatively short compared to the length of useful computations. Superconducting qubits, for instance, are currently the most advanced solid-state qubits, but they decohere after around 100 microseconds, and any information stored in these qubits is lost. On the other hand, useful quantum computations may require quantum information to survive on time scales that are many orders of magnitude longer, as their runtimes can reach several hours or even days. Topological quantum computing is an approach to construct qubits that survive for the entire duration of such a long computation. Topological quantum computing comes in two flavors. The condensed matter approach is to build error-resilient qubits using exotic quasiparticles in topological materials, most prominently Majorana zero modes in topological superconductors. Even though no such qubit has been built to date, the hope is that their coherence times may be significantly longer than the coherence times of currently available solid-state qubits, but are still expected to be too short for large-scale quantum computing. The quantum information approach is to combine many error-prone qubits to build more robust logical qubits using topological error-correcting codes, e.g., surface codes. Even though the first approach is hardware-based and the second approach is software-based, they are deeply related. With Majorana-based qubits, the main logical operations are Majorana fermion parity measurements. By replacing Majorana-based qubits with surface-code patches and parity measurements with lattice-surgery operations, schemes for quantum computation with Majorana-based qubits or with surface codes can be identical. In this thesis, we explore how to construct a large-scale topological fault-tolerant quantum computer that can perform useful quantum computations. Here, topological refers to the nature of the quantum error-correcting code, while the underlying hardware may be based on non-topological qubits, but could also be composed of Majorana-based qubits. We provide a complete picture of such a large-scale device, breaking down large quantum computations into logical qubits and logical operations, describing how these logical operations are performed on the level of physical qubits and physical gates, and finally discussing how these physical qubits can be pieced together in a Majorana-based system using topological superconducting nanowires.
Simulating fermionic systems on qubit-based quantum computers often demands significant computational resources due to the requirement to map fermions to qubits. Thus, designing a fault-tolerant quantum computer that operates directly with fermions offers an effective solution to this challenge. Here, we introduce a protocol for fault-tolerant fermionic quantum computation utilizing fermion-to-fermion low-density parity-check (LDPC) codes. Our method employs a fermionic LDPC memory, which transfers its state to fermionic color code processors, where logical operations are subsequently performed. We propose using odd-weight logical Majorana operators to form the code space, serving as memory for the fermionic LDPC code, and provide an algorithm to identify these logical operators. We present examples showing that the encoding rate of fermionic codes often matches that of qubit codes, while the logical failure rate can be significantly lower than the physical error rate. Furthermore, we propose two methods for performing fermionic lattice surgery to facilitate state transfer. Finally, we simulate the dynamics of a fermionic system using our protocol, illustrating effective error suppression.