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arXiv:1210.5799 · Physical Review A

Surface code with decoherence: An analysis of three superconducting architectures

Joydip Ghosh, Austin G. Fowler, Michael R. Geller

Published Dec 19, 2012• 91 citations
arXivHTMLPDF

Abstract

We consider realistic, multiparameter error models and investigate the performance of the surface code for three possible fault-tolerant superconducting quantum computer architectures. We map amplitude and phase damping to a diagonal Pauli ``depolarization'' channel via the Pauli twirl approximation, and obtain the logical error rate as a function of the qubit ${T}_{1,2}$ and state preparation, gate, and readout errors. A numerical Monte Carlo simulation is performed to obtain the logical error rates, and a leading-order analytic formula is derived to estimate their behavior below threshold. Our results suggest that scalable fault-tolerant quantum computation should be possible with existing superconducting devices.

DOI
10.1103/physreva.86.062318

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We consider realistic, multiparameter error models and investigate the performance of the surface code for three possible fault-tolerant superconducting quantum computer architectures. We map amplitude and phase damping to a diagonal Pauli ``depolarization'' channel via the Pauli twirl approximation, and obtain the logical error rate as a function of the qubit T1,2{T}_{1,2}T1,2​ and state preparation, gate, and readout errors. A numerical Monte Carlo simulation is performed to obtain the logical error rates, and a leading-order analytic formula is derived to estimate their behavior below threshold. Our results suggest that scalable fault-tolerant quantum computation should be possible with existing superconducting devices.
Experimental implementation of the surface code will be a significant milestone for quantum computing. We develop a circuit and a decoder targeted for near-term implementation of a distance-3 surface code. We simulate the code under amplitude and phase damping and compare the threshold to a Pauli-twirl approximation. We find that the approximation yields a pessimistic threshold estimate. From numerical Monte Carlo simulations, we identify the gate and measurement speeds required to achieve reliable error correction. For superconductor devices, a qubit encoded in a 17-qubit surface code demonstrates a lower error rate than an unencoded qubit assuming gate times of 5--40 ns and T1{T}_{1}T1​ times of at least 1--2 $\ensuremath{\mu}\mathrm{s}$. If ${T}_{1}\ensuremath{\ge}10$ ns, the difference is significant and can be experimentally measured, allowing near-term implementation and verification of a small surface code. For ion trap devices, gates times of 1 $\ensuremath{\mu}\mathrm{s}$ and ${T}_{1}\ensuremath{\ge}40$ ms admit measurable differences in error rate.
Quantum computers are far more error-prone than their classical counterparts. Therefore, to build a quantum computer capable of running large-scale quantum algorithms, we must use the techniques of quantum error correction to ensure that the computer produces the correct output even when its components are unreliable. However, the resource requirements of building such a fault-tolerant quantum computer are currently prohibitive. Here, we examine the utility of using three-dimensional (3D) surface codes in a fault-tolerant quantum computer. This family of topological error-correcting codes is a generalization of the well-known 2D surface code to three spatial dimensions. We show that certain 3D surface codes have a transversal logical non-Clifford gate. In a quantum computing architecture, a non-Clifford gate is required to achieve computational universality. Transversal gates do not entangle qubits in different codes, so they are naturally fault tolerant because they do not spread errors. Next, we consider the problem of decoding 3D surface codes. In a quantum error-correcting code, we cannot observe the qubits directly, so we measure parity-check operators to gain information about the state of the code. Decoding is the problem of estimating what error has occurred given a list of unsatisfied parity checks. We observe that 3D surface codes offer asymmetric protection against bit-flip and phase-flip errors, but in both cases, we find that a threshold error rate exists below which we can suppress logical errors by increasing the size of the code. We use our results about logical gates and decoding to propose two fault-tolerant quantum computing architectures that utilize 3D surface codes. Finally, we compare the resource requirements of our architectures with the requirements of leading quantum computing architectures based on topological codes. We find that one of our architectures may be competitive with the leading architectures, depending on the properties of the physical systems used to build the qubits.
Mid-circuit measurements are a major bottleneck for superconducting quantum processors because they are slower and noisier than gates. Measurement-free quantum error correction (mfec) replaces repeated measurements and classical feed-forward by coherent quantum feedback, but existing mfec protocols suffer from severe connectivity overhead when mapped to planar surface-code architectures: transversal interactions between logical patches require SWAP chains of length O(d)O(d)O(d) in the code distance, which increase depth and generate hook errors. This work introduces a 3D stacked surface-code architecture for measurement-free fault-tolerant quantum error correction that removes this connectivity bottleneck. Vertical transversal couplers between aligned surface-code patches enable coherent parity mapping and feedback with zero SWAP overhead, realizing constant-depth O(1)O(1)O(1) inter-layer operations in d while preserving local 2D stabilizer checks. A fault-tolerant mfec protocol for the surface code is constructed that suppresses hook errors under realistic noise. An analytical performance model shows that the 3D architecture overcomes the readout error floor and achieves logical error rates orders of magnitude below both standard measurement-based surface codes and 2D mfec variants in regimes with slow, noisy measurements, identifying 3D integration as a key enabler for scalable measurement-free fault tolerance.
Abstract Surface codes are building blocks of quantum computing platforms based on 2D arrays of qubits responsible for detecting and correcting errors. The error suppression achieved by the surface code is usually estimated by simulating toy noise models describing random Pauli errors. However, Pauli noise models fail to capture coherent processes such as systematic unitary errors caused by imperfect control pulses. Here we report the first large-scale simulation of quantum error correction protocols based on the surface code in the presence of coherent noise. We observe that the standard Pauli approximation provides an accurate estimate of the error threshold but underestimates the logical error rate in the sub-threshold regime. We find that for large code size the logical-level noise is well approximated by random Pauli errors even though the physical-level noise is coherent. Our work demonstrates that coherent effects do not significantly change the error correcting threshold of surface codes. This gives more confidence in the viability of the fault-tolerance architecture pursued by several experimental groups.
Fault-tolerant logical operations are fundamental for scalable quantum computation. Here, we report the experimental realization of lattice-surgery operations between a pair of distance-three surface-code logical qubits on a planar superconducting processor. During repeated syndrome extraction cycles, the logical qubits exhibit per-cycle error rates of 0.0365(2)0.0365(2)0.0365(2) and 0.0282(1)0.0282(1)0.0282(1), respectively, after leakage events are rejected. By leveraging joint initialization and lattice splitting, we deterministically prepare a logical Bell state, confirming genuine bipartite entanglement via the error-corrected logical state fidelity. We further execute a two-qubit Deutsch-Jozsa algorithm at the logical level to demonstrate algorithmic utility in a fault-tolerant framework. Finally, to achieve universal control, we implement magic-state injection and gate teleportation to realize continuous non-Clifford rotations about the logical XXX axis. For the logical RX(π/4)R_{X}(π/4)RX​(π/4) gate, we achieve a logical gate fidelity of 0.943−9+100.943_{-9}^{+10}0.943−9+10​ conditioned on the absence of detected errors. These results establish lattice surgery as a practical and versatile paradigm for logical computation in near-term surface-code architectures, representing a critical milestone toward scalable fault-tolerant quantum advantage in superconducting circuits.
Quantum error correction is a critical technique for transitioning from noisy intermediate-scale quantum devices to fully fledged quantum computers. The surface code, which has a high threshold error rate, is the leading quantum error correction code for two-dimensional grid architecture. So far, the repeated error correction capability of the surface code has not been realized experimentally. Here, we experimentally implement an error-correcting surface code, the distance-three surface code which consists of 17 qubits, on the Zuchongzhi 2.1 superconducting quantum processor. By executing several consecutive error correction cycles, the logical error can be significantly reduced after applying corrections, achieving the repeated error correction of surface code for the first time. This experiment represents a fully functional instance of an error-correcting surface code, providing a key step on the path towards scalable fault-tolerant quantum computing.