Junichi Haruna, Keisuke Fujii (May 27 2025).
Abstract: We propose and analyze a hierarchical quantum error correction (QEC) scheme that concatenates hypergraph product (HGP) codes with rotated surface codes to achieve fault-tolerant quantum computation on planar architectures with only nearest-neighbor interactions. The upper layer employs (3,4)-random HGP codes, known for their constant encoding rate and favorable distance scaling, while the lower layer consists of a rotated surface code with distance 5, allowing hardware compatibility through lattice surgery. To address the decoding bottleneck, we utilize a soft-decision decoding strategy that combines belief propagation with ordered statistics (BP-OS) decoding, enhanced by a syndrome-conditioned logical error probability computed via a tailored lookup table for the lower layer. Numerical simulations under a code capacity noise model demonstrate that our hierarchical codes achieve logical error suppression below the threshold. Furthermore, we derive explicit conditions under which the proposed codes surpass surface codes in both qubit efficiency and error rate. In particular, for the size parameter
s≥4 (which corresponds to 16 logical qubits) and the distance
d≥25, our construction outperforms the rotated surface code in practical regimes with physical error rates around or less than
10−2. These results suggest that concatenated qLDPC-surface architectures offer a scalable and resource-efficient path toward near-term fault-tolerant quantum computation.
