M. C. Smith, A. D. Leu, K. Miyanishi, M. F. Gely, D. M. Lucas (Dec 06 2024).
Abstract: We report the achievement of single-qubit gates with sub-part-per-million error rates, in a trapped-ion
43Ca
+ hyperfine clock qubit. We explore the speed/fidelity trade-off for gate times
4.4≤tg≤35 μs, and benchmark a minimum error of
1.5(4)×10−7. Gate calibration errors are suppressed to
<10−8, leaving qubit decoherence (
T2≈70 s), leakage and measurement as the dominant error contributions. The ion is held above a microfabricated surface-electrode trap which incorporates a chip-integrated microwave resonator for electronic qubit control; the trap is operated at room temperature without magnetic shielding.